A low noise, low residual offset, chopped amplifier for mixed level applications

Abstract

This paper describes the principle and the design of a CMOS low noise, low residual offset, chopped amplifier with a class AB output stage for noise and offset reduction in mixed analog digital applications. The operation is based on chopping and dynamic element matching to reduce noise and offset, without excessive increase of the charge injection residual offset. The main goal is to achieve low residual offsets by chopping at high frequencies reducing at the same time the 1/f noise of the amplifier. Measurements on a 0.8 /spl mu/m CMOS realization show reduction of 1/f noise and 18nV//spl radic/Hz residual thermal noise at low frequencies. The residual offset is lower than 100 /spl mu/V up to 8 MHz chopping frequency. Driving a 32 /spl Omega/ load the linearity is better than -80 dB and better than -88 dB for a 1 k/spl Omega/ load at 1 kHz.