Abstract
In this paper, a low flicker noise, 5 GHz direct conversion receiver (DRC) has been designed utilizing dynamic current injection (DCI) and tuning inductor in the mixing stage. This DRC has been designed in a TSMC 0.18 ¿m 1P6M CMOS process for WLAN 802.11a applications. The proposed DRC achieves 7.4 dB SSB-NF, 28 dB conversion gain (CG), -10 dBm IIP3, and 1/f noise corner frequency of 100 KHz with 80 mW power consumption from 1.8 V supply voltage. The active chip area was 1.9 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . All the simulations has been performed by Cadence Spectre® simulator.
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