A lazy and modular approach to int-blasting

Context. Implementation of modular arithmetic operations of addition, subtraction and multiplication by a tabular method based on the use of the tabular multiplication code. The object of the study is the process of tabular implementation of basic arithmetic operations on the residues of numbers represented in the system of residual classes.
 Objective. The goal of the work is to develop methods for the tabular implementation of the arithmetic operations of multiplication, addition and subtraction of the residues of two numbers based on the use of the tabular multiplication code.
 Method. Tabular methods for implementing integer arithmetic modular operations of addition, subtraction and multiplication are proposed for consideration. In order to reduce the amount of equipment for a tabular operating unit of computer systems that implements modular operations of addition, subtraction and multiplication by reducing the coincidence circuits AND in the nodes of the tables for implementing arithmetic operations based on the code of table multiplication, two methods for performing arithmetic modular operations of addition and subtraction have been developed. These methods are based on the code of tabular multiplication, the use of which will reduce the amount of equipment of the tabular operating unit. Thus, despite the difference in the digital structure of the tables of modular operations of addition, subtraction and multiplication based on the use of the tabular multiplication code, two new tabular methods for implementing arithmetic modular operations of addition and subtraction have been created. Based on them, algorithms for tabular execution of modular arithmetic operations of addition and subtraction have been developed. Using these algorithms, it is possible to synthesize a structurally simple, highly reliable and fast table operating unit that operates in a system of residual classes, which is based on three separate permanent storage devices (read-only memory), each of which implements only one fourth of the corresponding complete table of values of the modular operation, what is earlier in the theory tabular arithmetic was supposed to be impossible.
 Results. The developed methods are justified theoretically and studied when performing arithmetic modular operations of addition, subtraction and multiplication using tabular procedures.
 Conclusions. The conducted examples of the implementation of integer arithmetic modular operations of addition and subtraction can be considered as presented experiments. The results obtained make it possible to recommend them for use in practice in the design of computer systems operating in a non-positional number system in residual classes. Prospects for further research may be to create a tabular method for implementing integer arithmetic modular division operations based on the use of the tabular multiplication code.

Many SMT solvers implement efficient SAT-based procedures for solving fixed-size bit-vector formulas. These approaches, however, cannot be used directly to reason about bit-vectors of symbolic bit-width. To address this shortcoming, we propose a translation from bit-vector formulas with parametric bit-width to formulas in a logic supported by SMT solvers that includes non-linear integer arithmetic, uninterpreted functions, and universal quantification. While this logic is undecidable, this approach can still solve many formulas by capitalizing on advances in SMT solving for non-linear arithmetic and universally quantified formulas. We provide several case studies in which we have applied this approach with promising results, including the bit-width independent verification of invertibility conditions, compiler optimizations, and bit-vector rewrites.

The travelling salesman problem is one of the classic optimisation problems that is widely applied in real life, such as in the distribution of goods, transportation route planning, and even the movement of industrial robots. This study aims to implement algorithms for solving the travelling salesman problem using two different programming languages, namely Pascal and C++, and to compare their performance in terms of effectiveness, memory efficiency, and execution speed. The methods used include weighted graph modelling, shortest path calculation, and the application of the Branch and Bound algorithm. The test results show that both programming languages produce identical optimal routes, namely 1 – 5 – 6 – 7 – 10 – 9 – 8 – 4 – 2 – 3 – 1 with a minimum total distance of 196. The Pascal programme has the advantage of a simple syntax structure and low memory usage (±356 KB), while C++ excels in execution speed (0.09466 seconds) despite having a larger output file size (±1.26 MiB). This difference in performance indicates that Pascal is more suitable for educational purposes and small-scale applications, while C++ is superior for complex applications and modern system integration needs. Thus, the TSP algorithm can be implemented effectively using either Pascal or C++, and the choice of programming language should be tailored to the context of the requirements.

Ever-growing mobility and ubiquitous wireless Internet access raise the need for secure communication with devices that may be severely constrained in terms of processing power, memory capacity and network speed. In this paper we describe a lightweight implementation of the Secure Sockets Layer (SSL) protocol with a focus on small code size and low memory usage. We integrated a generic public-key crypto library into this SSL stack to support elliptic curve cryptography over arbitrary prime and binary fields. Furthermore, we aimed to secure the SSL handshake against side-channel attacks (in particular simple power analysis) by eliminating all data-dependent or key-dependent branches and memory accesses from the arithmetic operations and compare the resulting performance with an unprotected implementation. Our lightweight SSL stack has only 6% of the code size and RAM requirements of OpenSSL, but outperforms it in point multiplication over prime fields when no appropriate countermeasures against side-channel attacks are implemented. With such countermeasures, however, the execution time of a typical SSL handshake increases by roughly 50%, but still completes in less than 160 msec on a 200 MHz iPAQ PDA when using an elliptic curve over a 192-bit prime field.

A Kalman filter adapted to the estimation of mean gradients in the large-eddy simulation of unsteady turbulent flows

The objective of this project was to develop a semantic model of arithmetic and logical operations for virtual hardware; this goal was achieved through three main steps: Implement logic gates and arithmetic and logic units in Nand2tetris virtual hardware simulator software; Implement recursive and iterative functions to check the correct functioning of logical and arithmetic operations in the p-code machine virtual machine. In the first stage, implementations of the elementary logic gates were developed in the hardware simulator software Nand2tetris. From these logic gates, combinational circuits and sequential circuits were built as logical and arithmetic unit, Half Adder, Full Adder, 16-bit Addition, 16-bit logical negation, 16-bit logical AND, 16-bit logical OR, among others. The second stage involved experimenting at a high level with arithmetic and logical operations, provided by the virtual machine p-code machine, which was implemented in the C programming language, as addition, subtraction, greater than, less than. In the third stage, having already implemented logical and arithmetic operations, iterative and recursive programs were developed to calculate the nth value of the Fibonacci Sequence and the factorial of any number n.

A new version of the CADNA library for estimating round-off error propagation in Fortran programs

This paper addresses the problem of creating abstract transfer functions supporting dataflow analyses. Writing these functions by hand is problematic: transfer functions are difficult to understand, difficult to make precise, and difficult to debug. Bugs in transfer functions are particularly serious since they defeat the soundness of any program analysis running on top of them. Furthermore, implementing transfer functions by hand is wasteful because the resulting code is often difficult to reuse in new analyzers and to analyze new languages. We have developed algorithms and tools for deriving transfer functions for the bitwise and unsigned interval abstract domains. The interval domain is standard; in the bitwise domain, values are vectors of three-valued bits. For both domains, important challenges are to derive transfer functions that are sound in the presence of integer overflow, and to derive precise transfer functions for operations whose semantics are a mismatch for the domain (i.e., bit-vector operations in the interval domain and arithmetic operations in the bitwise domain). We can derive transfer functions, and execute them, in time linear in the bitwidth of the operands. These functions are maximally precise in most cases. Our generated transfer functions are parameterized by a bitwidth and are independent of the language being analyzed, and also of the language in which the analyzer is written. Currently, we generate interval and bitwise transfer functions in C and OCaml for analyzing C source code, ARM object code, and AVR object code. We evaluate our derived functions by using them in an interprocedural dataflow analyzer.

This paper addresses the problem of creating abstract transfer functions supporting dataflow analyses. Writing these functions by hand is problematic: transfer functions are difficult to understand, difficult to make precise, and difficult to debug. Bugs in transfer functions are particularly serious since they defeat the soundness of any program analysis running on top of them. Furthermore, implementing transfer functions by hand is wasteful because the resulting code is often difficult to reuse in new analyzers and to analyze new languages. We have developed algorithms and tools for deriving transfer functions for the bitwise and unsigned interval abstract domains. The interval domain is standard; in the bitwise domain, values are vectors of three-valued bits. For both domains, important challenges are to derive transfer functions that are sound in the presence of integer overflow, and to derive precise transfer functions for operations whose semantics are a mismatch for the domain (i.e., bit-vector operations in the interval domain and arithmetic operations in the bitwise domain). We can derive transfer functions, and execute them, in time linear in the bitwidth of the operands. These functions are maximally precise in most cases. Our generated transfer functions are parameterized by a bitwidth and are independent of the language being analyzed, and also of the language in which the analyzer is written. Currently, we generate interval and bitwise transfer functions in C and OCaml for analyzing C source code, ARM object code, and AVR object code. We evaluate our derived functions by using them in an interprocedural dataflow analyzer.

Satisfiability Modulo Theories (SMT) is a well-established methodology that generalises propositional satisfiability (SAT) by adding support for a variety of theories such as integer arithmetic and bit-vector operations. SMT solvers have made rapid progress in recent years. In part, the efficiency of modern SMT solvers derives from the use of specialised decision procedures for each theory. In this paper we explore how the Essence Prime constraint modelling language can be translated to the standard SMT-LIB language. We target four theories: bit-vectors (QF_BV), linear integer arithmetic (QF_LIA), non-linear integer arithmetic (QF_NIA), and integer difference logic (QF_IDL). The encodings are implemented in the constraint modelling tool Savile Row. In an extensive set of experiments, we compare our encodings for the four theories, showing some notable differences and complementary strengths. We also compare our new encodings to the existing work targeting SMT and SAT, and to a well-established learning CP solver. Our two proposed encodings targeting the theory of bit-vectors (QF_BV) both substantially outperform earlier work on encoding to QF_BV on a large and diverse set of problem classes.

We present MathSAT 4, a state-of-the-art SMT solver. MathSAT 4 handles several useful theories: (combinations of) equality and uninterpreted functions, difference logic, linear arithmetic, and the theory of bit-vectors. It was explicitly designed for being used in formal verification, and thus provides functionalities which extend the applicability of SMT in this setting. In particular: model generation (for counterexample reconstruction), model enumeration (for predicate abstraction), an incremental interface (for BMC), and computation of unsatisfiable cores and Craig interpolants (for abstraction refinement).KeywordsModel CheckPredicate AbstractionLinear ArithmeticInput FormulaUninterpreted FunctionThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

This paper presents an activity recognition using smartphone built-in accelerometer. One of the most important issues in implementing activity recognition on embedded systems, including smartphones, is to achieve a high accuracy with a low computational cost and low memory usage. In this paper, we propose an activity recognition using the fully convolutional networks and introduce a new method to generate an input signal image using the combination of deep features and orientation-independent features. The experimental results show that the proposed method is able to achieve a high accuracy with a low memory usage.

A fast algorithm with low memory usage is proposed for computer generated hologram calculation based on compressed look up table. The memory usage and the calculation time of the new C-LUT are both reduced.

We propose a O(1) algorithm for bilateral filter with low memory usage. Bilateral filter can be converted into weighted histogram operation. Applying line buffers of column histograms, we can reduce the number of calculation needed to construct recursive center-weighted local histogram. Also our method have advantage in terms of memory requirements. We used a 2-GHz CPU with our method and achieved one million pixels per 0.5 sec operation and high PSNR over 40 dB without the need for temporary frame buffers or additional instructions (downsampling, SIMD instructions, or multi-thread operations).

We investigate the domain of satisfiable formulas in satisfiability modulo theories (SMT), in particular, automatic generation of a multitude of satisfying assignments to such formulas. Despite the long and successful history of SMT in model checking and formal verification, this aspect is relatively under-explored. Prior work exists for generating such assignments, or samples, for Boolean formulas and for quantifier-free first-order formulas involving bit-vectors, arrays, and uninterpreted functions (QF_AUFBV). We propose a new approach that is suitable for a theory T of integer arithmetic and to T with arrays and uninterpreted functions. The approach involves reducing the general sampling problem to a simpler instance of sampling from a set of independent intervals, which can be done efficiently. Such reduction is carried out by expanding a single model—a seed—using top-down propagation of constraints along the original first-order formula.