Abstract

Micropatterned thin films when planarized using chemical mechanical polishing (CMP) accompany several inherent problems, especially dishing defects. The deteriorations in surface planarity limit the accuracy and flexibility of next fabrication steps, thus accounting for a major portion of yield losses in the mass production of microelectronic components. A hybrid polysilicon (poly-Si) planarization using a protective dioxide (SiO2) film and two slurries having diametrically opposite poly-Si-to-SiO2 selectivity is developed to suppress dishing defects in the CMP of patterned poly-Si films. A 30nm-thick protective SiO2 film is deposited on a patterned poly-Si film to protect recessed areas on the uneven poly-Si film; the SiO2-protected poly-Si film is planarized with the first slurry having low material selectivity to selectively remove the protective SiO2 film placed on protruding areas while effectively remaining it located on recessed areas; the primarily planarized poly-Si film is polished again with the second slurry having high material selectivity to minimize the amount of dishing defects. For diverse poly-Si layers having different pattern widths of 5–90μm, the dishing amount is measured less than 23.1nm after the hybrid poly-Si planarization, and noticeably the dishing amount is insensitive to the pattern width. This shows that our hybrid poly-Si planarization can improve the planarity of each poly-Si film in the fabrication of multi-level (or three-dimensional (3D)) microdevices. The dependence of the material removal rate of poly-Si films on critical slurry parameters such as slurry pH and abrasive concentration is also intensively discussed.

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