A hybrid chip interconnection architecture with a global wireless network overlaid on top of a wired network-on-chip

Abstract

Multi-core platforms are emerging trends in the design of Systems-on-Chip(SoCs). Among a number of possible alternatives, the wireless network-on-chip (WNoC), enabled by the availability of miniaturized on-chip antennas, is envisioned as a revolutionary approach which may bring in significant performance gain. In this paper, we present a new WNoC architecture with a layered topology. In essence, the whole on-chip mesh-based network is divided into several subnetworks where each of these subnetworks has a wireless node sitting at its center. This architecture reduces the latency and the dynamic power consumption between two long distant nodes communication in the network and can improve the communications throughput in high traffic applications. Experiment results shows that the performance improvements are 8% and 13% respectively, compared with two other WNoC architectures.