Abstract
In order to improve the accuracy and sampling rate of the image sensor and enhancing the performance of the system, a high performance switched-capacitor programmable gain amplifier is designed with 0.18μm CMOS technology and Cadence. The design scheme of programmable gain amplifier and offset correction digital-to-analog converter (DAC) is presented and the simulation experiment is carried out. The experimental result shows that that the programmable gain amplifier (PGA) can achieve a dynamic range of −3dB to 19dB with 256 gain steps. The offset correction DAC has ±8 bit resolutions and the output referred correction ranges and steps increase with the PGA gain, it can achieve a correction range of −507mV to 507mV with PGA gain 8x. At a 3.3V power supply and 40MS/s sampling rate, when the input voltage from 1V to 2 V, the system can achieve a SNDR (Signal to Noise and Distortion Ratio) of 91.4dB, which consumes less than 65mW of power.
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