A High Efficiency Doherty Power Amplifier MMIC With Active Second Harmonic Injection Technique

In advanced wireless communication systems, a rapid increase in the mobile data traffic and broad information bandwidth requirement can lead to the use of complex spectrally efficient modulation schemes such as orthogonal frequency-division multiplexing (OFDM). Generally, complex non-constant envelope modulated signals have very high peak-to-average ratios (PAPR). Doherty Power Amplifier (DPA) is the most commonly used power amplifier (PA) architecture for meeting high efficiency requirement in advanced communication systems, in the presence of high PAPR signals. However, limited bandwidth of the conventional DPA is often identified as a bottleneck for widespread deployment in base-station application for multi-standard communication signals. The research in this thesis focuses on the development of new designs to overcome the bandwidth limitations of a conventional PA. In particular, the bandwidth limitation factors of a conventional DPA architecture are studied. Moreover, a novel design technique is proposed for DPA's bandwidth extension. In the first PA design, limited bandwidth and linearity problems are addressed simultaneously. For this purpose, a new Class-AB PA with extended bandwidth and improved linearity is presented for LTE 5 W pico-cell base-station over a frequency range of 1.9-2.5 GHz. A two-tone load/source-pull and bias point optimization techniques are used to extract the sweet spots for optimum efficiency and linearity from the 6 W Cree GaN HEMT device for the whole frequency band. The realized prototype presented saturated PAE higher than 60%, a power gain of 13 dB and an average output power of 36.5 dBm over the desired bandwidth. The proposed PA is also characterized by QAM-256 and LTE input communication signals for linearity characterization. Measured ACPRs are lower than -40 dBc for an input power of 17 dBm. The documented results indicate that the proposed Class-AB architecture is suitable for pico-cell base-station application. In the second PA design, an inherent bandwidth limitation of Class-F power amplifier forced by the improper load harmonics terminations at multiple harmonics is investigated and analyzed. It is demonstrated that the impedance tuning of the second and third harmonics at the drain terminal of a transistor is crucial to achieve a broadband performance. The effect of harmonics terminations on power amplifier's bandwidth up to fourth harmonics is investigated. The implemented broadband Class-F PA achieved maximum saturated drain efficiency 60-77%, and 10 W output power throughout (1.1-2.1 GHz) band. The simulated and measured results verify that the presented Class-F PA is suitable for a high-efficiency system application in wireless communications over a wide range of frequencies. In the third PA design, a single- and dual-input DPA for LTE application in the 3.5 GHz frequency band are presented and compared. The main goal of this study is to improve the performance of gallium-nitride (GaN) Doherty transmitters over a wide bandwidth in the 3.5 GHz frequency band. For this purpose, the linearity-efficiency trade-off for the two proposed architectures is discussed in detail. Simulated results demonstrate that the single- and dual-input DPA exhibited a peak drain efficiency (DE) of 72.4% and 77%, respectively. Both the circuits showed saturated output power more than 42.9 dBm throughout the designed band. Saturated efficiency, gain and bandwidth of dual-input DPA are higher than that of the single-input DPA. On the other side, dual-input DPA linearity is worse as compared to the single-input DPA. In the last PA design, a novel design methodology for ultra-wide band DPA is presented. The bandwidth limitation factors of the conventional Doherty amplifier are discussed on the ground of broadband matching with impedance variation. To extend the DPA bandwidth, three different methods are used such as post-matching, low impedance transformation ratio and the optimization of offset line for wide bandwidth in the proposed design. The proposed Doherty power amplifier was designed and realized based on two 10 W GaN HEMT devices from Cree Inc. The measured results exhibited 42-57% of efficiency at the 6-dB back-off and saturated output power ranges from 41.5 to 43.1 dBm in the frequency range of 1.15 to 2.35 GHz (68.5% fractional bandwidth). Moreover, less than -25 dBc ACPRs are measured at 42 dBm peak output power throughout the designed band. In a nutshell, all power amplifiers presented in this thesis are suitable for wideband operation and their performances are satisfying the required operational standard. Therefore, this thesis has a significant contribution in the domain of high efficiency and broadband power amplifiers.

Doherty power amplifier (DPA) with high efficiency at the output power back off is highly demanded for modern wireless communication systems to achieve high data rates and reduce the power consumption and operation costs. This paper presents a new design strategy for enhancing DPA’s back-off efficiency. New design strategy called asymmetrical matching network is used to achieve asymmetric operation, which helps to compensate for the low power delivered by the peaking stage in the conventional DPA. The simulation results showed an enhancement in the back-off efficiency, where the proposed design is able toachieve 46-52% drain efficiency at 8 dB output power back-off while maintains high efficiency of 73-80 % at saturation over the designed bandwidth of 3.4-3.6 GHz. The proposed design is suitable for high efficiency sub-6 GHz fifth-generation wireless applications.<br /><div> </div>

In this paper, a high-efficiency Doherty power amplifier (DPA) using the complex combining load (CCL) with noninfinity peaking impedance for broadband operation is presented. By applying the CCL, the load impedance of the carrier amplifier at saturation power level can be compensated at different operation frequencies. Considering the influences of the output impedance of the peaking PA on the carrier PA, a detailed analysis of the optimal noninfinity peaking output impedance with the CCL is carried out on the whole operation frequency range. Theoretical analysis of the output power and drain efficiency (DE) reveals that the CCL can offer a new degree of freedom for extending the bandwidth of the DPA. Based on the proposed theory, a modified DPA working over the frequency band of 1.1-2.4 GHz (bandwidth of 74%) is designed and fabricated based on GaN HEMT devices. Experimental results exhibit 6-dB output back-off drain efficiencies of 43.8%-54.9% and saturated drain efficiencies of 55.4%-68% can be obtained. The saturated output power of the DPA is 43.3-45.4 dBm with a gain of 9.5-11.1 dB across the whole operation band. When driven with long-term evolution modulated signals with 6.5-dB peak-to-average power ratio, the DPA exhibits an adjacent channel leakage ratio better than -49 dBc while maintaining a DE of 44% after digital predistortion linearization.

Design of linearity-enhanced and high-efficiency Doherty power amplifier using a new phase compensation technique

To expand the operating frequency bands of the Doherty power amplifier (DPA), this paper proposes a dual-mode multi-band DPA design method employing impedance-and-phase constrained optimization based on reciprocal gate bias. By introducing the concept of reciprocal gate bias, the operating mode is switched by swapping the gate biases of the carrier and peaking amplifiers of the DPA, which effectively extend the operating frequency band without modifying the load modulation network. Furthermore, multiple impedance constraint circles are used to cover the optimum load impedance region obtained from the load-pull simulation. And, the phases required for impedance transformation network (ITN) across the multi-band are determined based on the impedance transformation requirements when the DPA operates in power back-off (PBO) state and saturation state. Then, the ITNs that satisfy the impedance and phase constraints can be optimized and designed. For verification, a dual-mode multi-band DPA, operating in Mode I at 1.96–2.10 GHz and 2.75–2.86 GHz, and in Mode II at 2.49–2.61 GHz and 3.20–3.36 GHz, is designed and fabricated. Measured results show that the output power of the DPA exceeds 43 dBm with corresponding saturated drain efficiencies (DEs) higher than 50% in both modes. For 6 dB PBO, the DEs are 49.4–55.7% and 49.8–51.7% in Mode I, whereas in Mode II, they range from 51.2% to 52.4% and from 50.4% to 53.5%. Moreover, good linearity can be achieved after linearization for 20 MHz modulated signals.

This paper proposes a method that employs novel hybrid continuous class-EFJ power amplifiers (PAs) as carrier PA to design a broadband high-efficiency Doherty power amplifier (DPA). Bandwidth characteristic of the proposed DPA is analyzed in detail. By proper selection of related parameter values, up to 78% fabrication bandwidth can be obtained. Post-harmonic tuning network is applied to improve the bandwidth and enhance the efficiency. Then, a closed design process is presented to design broadband DPA based on derived theories. For validation, a broadband DPA operating in 1.2-2.8 GHz is designed and fabricated. Measurements illustrate that the DPA can deliver saturated output power between 43.7 dBm and 44.1 dBm in 1.2-2.8 GHz, and the saturated drain efficiency from 60.5% to 74.2 % is achieved. Moreover, drain efficiency is 48.1%-57.6% at the 6 dB power back-off. Compared with conventional DPAs, the proposed DPA exhibits superior performance of bandwidth characteristics and power back-off efficiency over a wide bandwidth.

This paper presents the design and measurement results of a quad-band Doherty power amplifier (DPA) for concurrent operation in the 900 MHz, 1.5 GHz, 2.1 GHz and 2.6 GHz frequency bands. In principle, a quad-band DPA requires that all passive structures involving the DPA, but especially the impedance inverter network (IIN), be either broad-or multiband to cover the desired number of frequency bands. In this work, a newly developed multiband IIN is introduced, enabling the realisation of multiband symmetric and asymmetric DPAs. The design concept can theoretically be applied for a large number of frequency bands. The approach has been validated in hybrid technology using a 10 W and 25 W GaN-HEMT as carrier and peaking devices, respectively. The measured results show peak drain efficiencies of 58.12 %, 60.52 %, 52.74 %, and 43.3 %, associated with output powers of greater than 41.75 dBm in all four bands. The corresponding drain efficiencies at 6 dB output power back-off are measured to be 48 %, 56 %, 47 % and 31.8 % for the first, second, third, and fourth band, respectively. To the best of our knowledge, this is the first time a quad-band concurrent DPA has been successfully designed and implemented.

This paper presents a high-power, high-efficiency GaN HEMT Doherty power amplifier (DPA) for 3.5-GHz-band LTE macro-cell base-stations. To enhance the efficiency of the DPA, a new input matching circuit design based on a normalized peak amplifier's power ratio is proposed. A symmetrical DPA with the circuit is designed using 64.6% drain efficiency, 200W GaN HEMTs. The design shows significant improvement of both backed-off and peak efficiency of the DPA. At 3.51-GHz, high drain efficiency of 51.7% and 49.2 dBm (83 W) output power are achieved with a power gain of 13.5 dB and ACLR of −50.6 dBc using a LTE single carrier and digital predistortion system. This is the first demonstration of a GaN HEMT DPA of over 80W for 3.5-GHz-Band LTE macro-cell base-stations.

This paper presents the design of an asymmetrical Doherty power amplifier (DPA) with improved linearity and efficiency performance. Resonator-type drain bias networks, providing high impedances at the carrier frequency and low impedances with small variation at the envelope frequency, are introduced to reduce the DPA's memory effects when transmitting wideband signals. The general criteria for DPA design are summarized, and the approach to obtain optimum fundamental and harmonic impedances is proposed to achieve back-off efficiency enhancement. For experimental validation, the asymmetrical DPA is designed and implemented using two identical GaN HEMTs. Measured with continuous wave (CW), the proposed DPA delivers a saturation power greater than 49.3 dBm from 3400 to 3600 MHz, along with high drain efficiency of over 62% and 48% at peak and 8-dB back-off power, respectively. Driven with 100-MHz LTE-advanced signals, the adjacent channel leakage ratio (ACLR) asymmetry of the DPA at 20-MHz offset is lower than 1-dB. After digital predistortion (DPD) linearization, the proposed DPA achieves an ACLR of better than �48 dBc at an average output power about 41 dBm and the drain efficiency over 45% across the frequency band.

This article proposes a modified load modulation network (LMN) to adjust the structure of the traditional Doherty power amplifier (DPA) by changing one λ/4 microstrip line at the output of the main power amplifier into two in the traditional DPA and connecting a terminal open-circuit λ/2 line at the junction point which can reduce the frequency dispersion effect to achieve expanding bandwidth while maintaining saturation efficiency and back-off efficiency. A 2.6–3.6 GHz DPA is designed and fabricated for verification. The measured results show that the saturated output power is 42.5–44 dBm and the saturated efficiency is between 63% and 69% in target band with a gain from 8.5 to 9.5 dB. At 6 dB output power back-off, the drain efficiency is 44%–50%. And the adjacent channel power ratio (ACPR) is better than −32 dBc.

ABSTRACTIn this article, we present a simplified Doherty power amplifier (DPA) architecture for the easy implementation of dual‐band operation. The proposed DPA structure eliminates the 35 Ω quarter wavelength impedance inverters used in the conventional DPAs by matching the output impedances of the carrier and peak amplifiers of the DPA to other values (e.g., 100 Ω). The electrical lengths of the offset line and the phase compensation line are carefully chosen to enhance the Doherty effect (high efficiency at back‐off power level) at two assigned frequency bands. Broadband matching networks are also designed to increase the operation bandwidths at the two designed bands. To prove the design concept, a dual‐band DPA is designed and measured. In the first frequency band (550–650 MHz), the designed DPA provides 60.6–76.3% drain efficiency (DE) at full output power, 46–54.9% DE at 6 dB of output power back‐off (OBO); in the second frequency band (950–1050 MHz), the designed DPA provides 51.4–61.2% DE at full output power, 35–38% DE at 6 dB of OBO. © 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:953–956, 2015

In this article, a novel high‐efficient Doherty power amplifier (DPA) is designed for linearity improvement from 2.1 to 2.4 GHz. The proposed DPA employs a pair of anti‐coupled lines loaded with a stepped impedance resonator to replace the λ/4 transmission line in the conventional DPA for harmonic suppression, phase compensation, and impedance transformation. The DPA is simulated, fabricated, and measured. As the measured results show, in the 2.1‐2.4 GHz band, the saturated output power is between 43.2 and 44.5 dBm with the saturated gain level between 10.2 and 11.5 dB. The saturated drain efficiency (DE) is between 60% and 70% with DE at 6 dB output power back‐off between 38% and 50%. Compared with the conventional DPA, the third‐order intermodulation distortion is reduced by 20 dB. The efficiency and gain have also been improved. The proposed DPA is feasible and applicable in modern wireless communication systems.

In this paper, the high efficiency Doherty power amplifier has been designed and realized for microwave applications. The Doherty amplifier has been implemented using silicon MRF 281 LDMOS FET. The RF performances cf the Doherty power amplifier (a combination of a class AB carrier amplifier and a bias-tuned class C peaking amplifier) have been compared with those of a class AB amplifier alone. The realized Doherty power amplifier P1dB output power has 33dBm at 2.3GHz frequency. Also the Doherty power amplifier shows 11dB gain and -17.8dB input return loss at 2.3GHz to 2.4GHz. The designed Doherty amplifier has been improved the average PAE by 10% higher efficiency than a class AB amplifier alone. The Maximum PAE of designed Doherty power amplifier has been 39%.

In this paper, design, simulation and fabrication of a new highly extended high-efficiency range Doherty power amplifier (DPA) for high peak to average power ratio (PAPR) communication signals were presented with a main and only a single auxiliary amplifier. In order to extend the output high-efficiency range, it employed non-equal cells as main and auxiliary amplifiers in the complex combining load (CCL) methodology. As a new method, a new design parameter ( $$\gamma$$ ) was added to the conventional complex combining load method. The effect of the new added design parameter on extension of output back-off (OBO) were analyzed and formulated. Also, to verify the proposed methodology, a DPA with 12 dB of OBO was designed, simulated and fabricated for WCDMA applications. Large signal continuous wave measurement results show the power gain of 11 dB with the drain efficiency of 53% at 12 dB of OBO. Two-tone test exhibits the third-order intermodulation distortion lower than − 34 dBc. Modulated wave simulations show over 51% of average drain efficiency and lower than − 31 dBc of adjacent channel leakage power ratio at output power level of 31.5 dBm.

In this paper, a mixed topology for high efficiency, broadband Doherty power amplifier (DPA) is proposed. The transistor gate biases are set to deep Class-AB for the carrier device and deep Class-C for the peaking device, which enable the DPA to achieve its high efficiency. However, this biasing scheme leads to an inadequate back-off range, which in the past limited applicability. To compensate for this reduced back-off range, a “ $\pi $ -type” harmonic injection network (HIN) is integrated into the DPA thereby allowing the second harmonic to be injected between the two active devices. This achieves waveform engineering, which enhances the output power of the peaking amplifier. However, the use of this HIN leads to a reduction in bandwidth due to a mismatch at the fundamental frequency. A bandwidth compensation technique is then proposed, thereby reducing the peaking device drain impedance variation. This mitigates the reduction in bandwidth as a result of the HIN. A high-efficiency DPA is prototyped based on two identical 10-W gallium nitride HEMTs. Measurement results show that a drain efficiency of greater than 60% is achieved at 5.3–6-dB output back-off power from 1.4 to 2.1 GHz.