Abstract
The importance of integrated circuit (IC) reliability has been growing to benefit from the potentials of advanced semiconductor technologies in long-living applications, such as automotive electronics. Today, prototypes and products are tested for their reliability. The most important procedures are summarized in the industry standard AEC-Q100 for automotive ICs. There are indications that these tests will not be sufficient for future applications so that simulation-based reliability assessments are expected to complement them soon. Circuit-level aging simulations are one approach to virtually investigate the IC reliability before entering manufacturing. Although they have been available for years, they still appear rarely used. Despite significant progress in research and industry, degradation modeling and validation of aging simulations are still demanding and need improvements. This article focuses on degradation modeling and outlines challenges as well as a solution approach to establish aging simulations as a widespread verification step in future IC design projects.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
