A Fully Integrated 16-MHz Voltage-Mode Relaxation Oscillator With Current Calibration for Temperature Compensation

The objective of this project is to design a low-power, low-noise, highly-sensitive accelerometer ASIC interface using standard CMOS technology. The capacitive acceleration sensor is based on Micro-Electro-Mechanical Systems (MEMS) technology. For the targeted security applications, the bulk-micromachined accelerometer which has been developed by Temasek Laboratory@NTU, is employed as the sensing element to couple with the abovementioned ASIC readout circuit. The auto-zero time-multiplexed differential technique is able to tolerate a number of circuit non-idealities. These include operational amplifier (op-amp) offset, offset thermal drift and switch errors of switched-capacitor (SC) circuits. The unique single-ended circuit architecture avoids the stringent requirement for component matching and eliminates the common-mode problem in conventional fully differential interface circuitry. Ultimately, it improves S/N ratio and cancels the common-mode errors in the sensing system with low power consumption. For the implementation of the ASIC design to the intended accelerometer application, it involves several circuit building blocks. They are readout circuit, oscillator, differential-to-single-ended SC gain amplifier stage, passive RC filter and low-offset low-noise op-amp buffer. A novel Auto-Zero Time-multiplexed Capacitance-to-Voltage Converter (AZTMD-CVC) is proposed for the readout circuit in this project. The circuit architecture achieves differential output performance whilst using only single-ended CVC topology. This approach eliminates the use of bulky full Wheatstone bridge sensing element in the MEMS sensor as required in conventional fully differential sensor interface architecture, with additional benefit in reducing the fabrication cost of the MEMS sensor and readout circuit, as well as the power consumption. Besides, a low-power design strategy, pertaining to power versus noise in the readout circuit, is proposed. It permits the design to attain low noise without using excessive power consumption. This offers the optimal power-noise product in a form of figure-of-merit (FOM) on the AZTMD-CVC. Two new oscillator circuits have been presented in this work. Both the oscillator designs offer clock signals with good temperature and supply variation immunity. The first oscillator design is a compact low-power CMOS ring oscillator with temperature and supply compensation whereas the second oscillator design deals with the relaxation oscillator using the tracking current comparator. The second design is adopted in this AZTMD-CVC circuit together with the silicon implementation for prototype testing. The key feature of the second oscillator is that of the temperature compensation without resorting to any external resistor component. The tracking current comparator based oscillator provides a 172 kHz clock for the interface circuit. This clock signal displays a 0.17% variation within the supply range from ±1.6V to ±2V whereas the mean temperature compensated coefficient for 5 samples of this oscillator frequency is around 0.018%/°C with a temperature range of -40 to 90°C. The power consumption of this oscillator circuit is only 4.2uA (21uW), demonstrating low-power consumption feature. The accelerometer ASIC has been designed and implemented using the AMS 0.35µm CMOS 3.3/5V process technology. This accelerometer interface IC features both the offset and gain trimming which enable the IC to operate correctly even under the process variation of the fabricated MEMS capacitance sensor. The prototype testing results have shown that the accelerometer readout system achieves a sensitivity of 1.95V/g. The system achieves a low noise level of -100 dBm/Hz, which corresponds to an equivalent acceleration noise of 1.16 µg/√Hz. The total power consumption including the clock generator is only 1.2 mW with 2.5V dual supplies. The measured in-run bias stability under 0g acceleration is 7.5 µg over around 3 hours’ time. This is comparable with other reported highly-sensitive accelerometers. This measurement results have validated that the proposed design can meet low-power low-noise objectives with very high sensitivity. It outperforms the reported state-of-art works in performance comparison.

This paper proposes a method to minimize the EMI by irregularly converting the frequency of the Relaxation Oscillator through the frequency hopping circuit. In addition, the effect of applying this technique to the DC-DC converter and the effect of this result on the RF transceiver system have been studied in terms of noise. The main frequency of the proposed Relaxation Oscillator is 7.9 MHz to operate it and add temperature compensation block to be applied to the frequency compensation in response to temperature changes. The DC-DC Converter spurious tone is reduced up to 20 dB through changing frequency randomly. It is fabricated in 0.18 μm CMOS technology. The active area occupies an area of 220 μm × 280 μm. The supply voltage is 1.8 V and current consumption is 500 μΑ.

This paper proposes Relaxation Oscillator with Random Number Generator to minimize electromagnetic interference (EMI) noise. DC-DC Converter with Relaxation Oscillator is presented how much spurious noise effects to RF Receiver system. The main frequency of the proposed Relaxation oscillator is 7.9 MHz to operate it and add temperature compensation block to be applied to the frequency compensation in response to temperature changes. The DC-DC Converter Spurious noise is reduced up to 20 dB through changing frequency randomly. It is fabricated in 0.18 μm CMOS technology. The active area occupies an area of 220 μm×280 μm. The supply voltage is 1.8 V and current consumption is 500 μA.Key words: Relaxation Oscillator, EMI, Random Number Generator, Temperature Compensation tœžŸs— ž(College of Information & Communication Engineering, SungKyunKwan University) *SK i¢(SK Telecom)Manuscript received July 6, 2015 ; Revised September 4, 2015 ; Accepted September 11, 2015. (ID No. 20150706-07S)Corresponding Author: Kang-Yoon Lee (e-mail: klee@skku.edu)

This paper presents a Spread Spectrum Clock Generator (SSCG) based on Relaxation oscillator using Up/Down Counter. The current is controlled by a counter and the spread spectrum of the Relaxation Oscillator. A Relaxation Oscillator with temperature compensation using the BGR and ADC is presented. The current to determine the frequency of the Relaxation Oscillator can be controlled. The output frequency of the temperature can be compensated by adjusting the current according to the temperature using the code that is the output from the ADC and BGR. EMI Reduction of SSCG is 11 dB, and Spread down frequency is 150 kHz. The current consumption is <TEX>$600{\mu}A$</TEX> from 5V and the operating frequency is from 2.3 MHz to 5.75 MHz. The rate of change of the output frequency with temperature was approximately <TEX>${\pm}1%$</TEX>. The SSCG is fabricated in a 0.35um CMOS process with active area <TEX>$250um{\times}440um$</TEX>.

The design of a 22 KHz 358 nW CMOS relaxation oscillator with a process and temperature compensation scheme is presented. Instead of the commonly used RC time constant, the oscillation period of the proposed circuit is determined by the resistance ratio of several resistors, which is insensitive to process and temperature variations. The on-chip relaxation oscillator is simulated in a 0.18 [Formula: see text]m CMOS process. Without any calibration or off-chip components, the frequency variation of the proposed oscillator is ±[Formula: see text]3.24% across [Formula: see text] to 100[Formula: see text]C temperature range and 5 different process corners. Compared to the conventional relaxation oscillator, the frequency variation of this circuit is reduced by 89%. The simulated temperature coefficient is 111 ppm/[Formula: see text]C, and the frequency variation over the supply voltage from 1.2 V to 1.7 V is 2.1%/V. The typical power consumption of the proposed circuit is 358 nW.

본 논문에서는 BGR과 ADC를 사용하여 Temperature Compensation 기능을 가진 Relaxation Oscillator를 제안한다. Relaxation Oscillator는 전류조절을 통해 주파수를 결정한다. 제안하는 Relaxation Oscillator는 온도에 따른 출력 주파수를 보상하기 위하여 온도에 따른 ADC 및 BGR의 출력 코드를 사용하여 전류를 조절한다. 제안하는 Relaxation Oscillator는 CMOS 0.35 <TEX>${\mu}m$</TEX> 공정으로 설계되었으며, 면적은 <TEX>$240{\mu}m{\times}210{\mu}m$</TEX> 이다. 전류 소모는 공급전압인 5 V에서 600 <TEX>${\mu}A$</TEX>이며, 온도에 대한 출력 주파수는 <TEX>${\pm}1%$</TEX>이내의 정확도를 가진다. In this paper, a Relaxation Oscillator with temperature compensation using BGR and ADC is presented. The current to determine the frequency of Relaxation Oscillator can be controlled. By adjusting the current according to the temperature using the code that is output from the ADC and BGR, was to compensate the output frequency of the temperature. It is fabricated in a 0.35 <TEX>${\mu}m$</TEX> CMOS process with an active area of <TEX>$240{\mu}m{\times}210{\mu}m$</TEX>. Current consumption is 600 <TEX>${\mu}A$</TEX> from a 5 V and the rate of change of the output frequency with temperature shows about <TEX>${\pm}1%$</TEX>.

A fully on-chip, low-power and small area CMOS Relaxation Oscillator (ROSC) with voltage integral feedback structure and a new Bandgap Reference voltage (BGR) for accurate oscillation frequency independent of the PVT and comparator's delay variations is presented. The designed circuit uses a new bandgap reference to generate the reference voltage required by relaxation oscillator which allow variations due to voltage and temperature to be compensated. Another merit of this oscillator is that the phase noise at low-offset frequency is suppressed by the voltage integral feedback circuit. The frequency of the relaxation oscillator is determined by the RC response time. Thus, the current and capacitance are controlled by temperature and process compensation circuits to compensate for the frequency variation. The ROSC is implemented in a 0.18µm CMOS technology and its active area is 0.14mm2. The target frequency is 25MHz and current consumption is 22µA, where V DD is 1.8V. The oscillation frequency variation for V DD ranges from 1.4 to 1.9V is 0.2% and for temperature ranges from −40 to 125°C is 0.18%.

This work presents a compact and power-efficient kHz-range relaxation (RC) oscillator with robust performance against temperature and voltage variations. By deliberately introducing a negative-offset voltage into the comparator, an offset cancellation scheme leveraging chopping and piecewise charge-acceleration facilitates a low temperature coefficient. A low-power comparator with a tail resistor and a low oscillation amplitude improves the energy efficiency. The die area is compact by introducing leakage-based temperature compensation that eliminates bulky resistors and complex calibration. Prototyped in a 28-nm CMOS process and measured at 28.5 kHz, our oscillator occupies 0.0046 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{2}$</tex-math> </inline-formula> and dissipates 27.6 nW at a 0.8-V supply. The energy efficiency is 0.97 nW/kHz, and the temperature coefficient is 33.3 ppm/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{\circ}$</tex-math> </inline-formula> C over <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$-$</tex-math> </inline-formula> 40 to 85 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{\circ}$</tex-math> </inline-formula> C with 1-point calibration. The corresponding FoM of 164.9 dB compares favorably with the recent arts. The start-up time is rapid, and the period settling time is within one cycle of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim$</tex-math> </inline-formula> 5.7 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu$</tex-math> </inline-formula> s. The Allan deviation is <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\le $</tex-math> </inline-formula> 40 ppm for measurement intervals of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$&gt;$</tex-math> </inline-formula> 0.5 s.

A 51.3-MHz 18- $\mu\text{W}$ 21.8-ppm/°C relaxation oscillator is presented in 90-nm CMOS. The proposed oscillator employs an integrated error feedback and composite resistors to minimize its sensitivity to temperature variations. For a temperature range from −20 °C to 100 °C, the fabricated circuit demonstrates a frequency variation less than ±0.13%, leading to an average frequency drift of 21.8 ppm/°C. As the supply voltage changes from 0.8 to 1.2 V, the frequency variation is ±0.53%. The measured rms jitter and phase noise at 1-MHz offset are 89.27 ps and −83.29 dBc/Hz, respectively.

Relaxation oscillators with wide dynamic range are required for low power frequency modulated switch mode DCDC regulator designs. In this brief, a temperature compensation technique with variable threshold control for Voltage Controlled Relaxation Oscillator (VCRO) is presented. The voltage to current conversion circuit reduces the drift in the frequency gain across temperature by introducing a PMOS-NMOS current gain compensation scheme. The current gain circuit also allows absolute control on the minimum value of control voltage after which VCRO starts doing voltage to frequency conversion. This restricts the amplifier to go out of saturation which is inherently generating the control voltage for VCRO. Measurement results show that across temperature range of -40 oC to 150 oC, the oscillator achieves a temperature stability of 187 ppm/oC at 18MHz and 171 ppm/oC at 92.5MHz respectively. Implemented in 90nm process node, it occupies 57μm×32μm area while dissipating 2.61 nW/KHz from a 1.5V supply.

A −40–125 °C, 0.8 V, 33 kHz relaxation oscillator with integrated voltage and current reference and compensated comparator delay

A 2MHz, low temperature coefficient relaxation oscillator with hybrid temperature compensation and real-time calibration

In this paper, the analog front end (AFE) for an inductive position sensor in an automotive electromagnetic resonance gear control applications is presented. To improve the position detection accuracy, a coil driver with an automatic two-step impedance calibration is proposed which, despite the load variation, provides the desired driving capability by controlling the main driver size. Also, a time shared analog-to-digital converter (ADC) is proposed to convert eight-phase signals while reducing the current consumption and area to 1/8 of the conventional structure. A relaxation oscillator with temperature compensation is proposed to generate a constant clock frequency in vehicle temperature conditions. This chip is fabricated using a 0.18- $\mu \text{m}$ CMOS process and the die area is 2 mm $\times 1.5$ mm. The power consumption of the AFE is 23.1 mW from the supply voltage of 3.3 V to drive one transmitter (Tx) coil and eight receiver (Rx) coils. The measured position detection accuracy is greater than 99.8 %. The measurement of the Tx shows a driving capability higher than 35 mA with respect to the load change.

In this paper, a CMOS relaxation oscillator with trimming and temperature compensation is presented for the on-chip multi-sensor systems which need MHz level frequency source. The proposed scheme uses a single current branch to charge the capacitor to generate the oscillation with voltage average feedback (VAF) circuit. Binary-weight current trimming array is adopted to reduce the frequency variation caused by the process variation under different process corners. A compensation calibration resistor array with Kelvin connection is utilized to improve the frequency variation with temperature. With the help of VAF, the frequency spread caused by the comparator delay is suppressed. This relaxation oscillator with a typical frequency of 13.4 MHz is implemented in a standard 180 nm CMOS process. Simulation results show that it achieves a frequency temperature coefficient of 28.3 ppm/∘C from [Formula: see text]C to 125∘C and a 0.074%/0.1 V frequency variation when supply voltage changes from 2.9 to 3.7 V.

This paper reports an ultra-low voltage (ULV) relaxation oscillator (RxO) suitable for self-powered devices, designed with a pair of asymmetric swing-boosted (ASB) RC networks. This work enhances low-voltage operational capabilities and improves frequency stability and jitter performance. The RxO features a unique single amplifier configuration incorporated with a customized feedback mechanism that effectively compares the output voltages from the RC networks, substantially reducing jitter due to flicker noise. Additionally, we implement a Duty-Cycling Circuit (DCC) based on a DLL architecture to turn on the amplifier before the desired detection point, providing ample guard time and thereby reducing power consumption, which is essential for ultra-low power applications. The RxO also features a Replica Temperature Compensation Circuit (RTCC) to mitigate circuit delay. Fabricated in 65-nm CMOS, the RxO operates at 2.35 MHz with a minimal supply voltage of 0.5 V, achieving a period jitter of 390 ppm and line sensitivity of 17.4%, and an energy efficiency of 5.82 pJ/cycle. The device demonstrates significant improvements over existing ULV designs, achieving up to 60% reduction in power consumption while maintaining lower jitter levels.