Abstract
This paper presents a Sequence Detector Synchronization System (SD-SS) capable of extracting the positive, negative and zero sequence components of a three phase signal. The system is frequency adaptive, and provides real time frequency, phase and amplitude estimations of the extracted positive sequence component. The SD-SS is able to operate over a wide range of frequencies (40-2000Hz), and in the presence of significant input signal distortion (THD as high as 100%). The SD-SS dynamically compensates for DC offsets and is capable of achieving parameter estimations in compliance with the IEEE Std.C37.118-2011 for synchrophasors. The system employs an adaptive FIR filtering technique that offers a high degree of immunity to harmonics and notch-types disturbances over the full operating range of frequencies. In the event of input transients such as balanced/unbalanced amplitude sags and swells, balanced/unbalanced phase steps and positive or negative frequency ramps (up to 700Hz/sec), the system achieves a worst case transient response time of 2 cycles of the input period. The SD-SS is implemented as a proof of concept on a Field Programmable Gate Array (FPGA) platform.
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