A Few-Step and Low-Cost Memristor Logic Based on MIG Logic for Frequent-Off Instant-On Circuits in IoT Applications

Abstract

Nonvolatile logic implemented by memristor devices is a potential candidate for inherent logic-in-memory architecture. Majority-inverter graph (MIG) logic is a novel logic-structure compared with conventional AND/OR/INV graphs logic. In this brief, MIG logic constructed by memristors is proposed to implement the stateful logic arithmetic. A design of full adders based on MIG logic is proposed, followed by a 4-bit Wallace tree multiplier based on the MIG logic to implement in-situ store. A test chip controlled by a FPGA is designed to verify its feasibility. Compared with multipliers implemented by conventional logic, this method has fewer steps and smaller area, making it suitable for frequent-off and instant-on circuits in IoT applications. The experimental results have proved its significance on the grounds that the 4-bit multiplier only needs 18 processing steps with 51 memristor cells to complete a multiplication arithmetic whereas, by contrast, one conventional 4-bit binary multiplier requires 648 MOSFETs and 124 steps while IMP based 4-bit multiplier logic requires 112 CRS units and 221 steps to operate a multiplying computation.