A dynamic element matching technique for reduced-distortion multibit quantization in delta-sigma ADCs

Abstract

A multibit /spl Delta//spl Sigma/ analog-to-digital converter can achieve high resolution with a lower order modulator and lower oversampling ratio than a single-bit design. However, in a multihit /spl Delta//spl Sigma/ modulator, quantization level errors in the internal multibit quantizer can limit the /spl Delta//spl Sigma/ modulator's signal-to-noise-and-distortion and spurious-free dynamic range. For a CMOS /spl Delta//spl Sigma/ analog-to-digital converter using a flash analog-to-digital converter as its internal quantizer, comparator input offset errors are a significant source of quantization level errors. This paper presents a dynamic element matching (DEM) technique, comparator offset DEM, that modulates the sign of the comparator input offsets with a random sequence and causes the offset errors to appear as white noise and attenuated spurious tones. Measured performance of a prototype /spl Delta//spl Sigma/ modulator IC shows that comparator offset DEM enables it to achieve 98-dB peak signal-to-noise-and-distortion and 105-dB spurious-free dynamic range. Analysis and simulation of comparator offset DEM in a flash analog-to-digital converter with a periodic input and uniform dither give insight into its operation and quantify the spur attenuation it provides.