Abstract
Routing algorithms have been developed for use in automatic Integrated Circuit (IC) layout programs. The algorithms address the following issues: (1) completion enhancements to eliminate cyclic constraints and achieve 100 percent routing completion, although possibly sacrificing optimality; (2) a dogleg "optimal" channel router which allows more than one horizontal segment per net and uses a branch and bound method to find a minimal routing for the given set of nets; and (3) shortcut techniques to reduce the amount of time spent using the branch and bound method.
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