A Design of Power Amplifier using Enhanced Simple Real Frequency Technique
This paper presents a wide-band microstrip power amplifier designed using an enhanced simple real frequency technique (ESRFT), which considers both back-end and front-end impedances and employs iterative optimization. The fabricated PA achieves a gain up to 13 dB from 0.8 to 1.6 GHz, with a maximum power added efficiency of approximately 70%, surpassing a baseline design, and suppresses third harmonic distortion up to 25 dBc.
In this paper, a novel discrete wide-band microstrip power amplifier (PA) is designed and fabricated based on the enhanced simple real frequency technique (ESRFT) to achieve a higher power added efficiency (PAE) over a wide frequency range compared to the conventional simple real frequency technique (SRFT). To compare the ESRFT with the SRFT, a basic PA using the SRFT is designed additionally. The ESRFT applies the feedback effects that play an important role in the PA design process, especially for high-frequency applications. Unlike the SRFT, the ESRFT considers both the back-end and the front-end impedance of the active device, while it is loaded by the designed input matching network (IMN) and the output matching network (OMN), respectively. The parasitic feedback elements of the transistor disturb the designed IMN and OMN. Therefore, an iterative method can converge to a better result. The matching networks (MNs) are modeled as a single matching problem, formulated and calculated in the Richard domain. The MNs are constructed by cascading microstrip unit elements (UEs) to obtain a wide-band simple structure. The characteristic impedances of the UEs are derived using the Richard extraction process. The fabricated PA shows good agreement between the simulation and measurement results. It has a wide-band gain of up to 13 dB from 0.8 GHz to 1.6 GHz, with a maximum PAE of about 70% that has been improved compared to the designed basic PA. Furthermore, the third harmonic is suppressed up to 25 dBc.
- Dissertation
- 10.32657/10356/69686
- Jan 1, 2017
To meet the demand of achieving a multi-Gbps data-rate for the next-generation wireless local area network (WLAN), the 60GHz frequency band is now being explored as a complementary to the existing 2.4GHz and 5GHz frequency bands for WLAN. To take advantages of the high data-rate at 60GHz and the long communication distance at 2.4GHz and 5GHz, transceivers for the next generation WLAN are required to support all of the three frequency bands. As a block which is critical to the communication distance, data-rate and power consumption of a RF system, power amplifiers (PAs) are very important and challenging to design for the next generation of WLAN. For the 2.4GHz and the 5GHz bands which have long been used for WLAN, reported PAs have all been designed separately for each band to optimize the performance. To reduce the circuit area and simplify the RF system for the next generation WLAN, a wideband PA with a bandwidth of 2 to 6GHz is designed in this thesis so that both of these two frequency bands can be supported by one PA. By using a technique to design output matching networks for both the fundamental and 2nd harmonic of Class-AB PAs with bandwidth larger than one octave, the designed PA demonstrates a maximum power-added efficiency (PAE) of 28.4% and an overall PAE above 19% in the entire bandwidth, which is comparable to the PAE of reported WLAN PAs designed separately for the 2.4GHz and the 5GHz bands. When compared to a counterpart without matching for 2nd harmonic, the PA shows a maximum improvement of saturated output power (PSAT) and PAE by 1.9dB and 7.5% respectively. From 2 to 6GHz, the PA is capable of delivering an output power of 11.12-13.24dBm with EVM=-28dB for 11n formatted signals with 64QAM modulation, and 9.31-11.31dBm with EVM=-32dB for 11ac format signal with 256QAM modulation. For the newly introduced 60GHz frequency band, a big challenge of PA design is to maintain good power performance in the large bandwidth of 57 to 66GHz. To address this challenge, it is analyzed in this thesis that both the inter-stage matching network and the output matching network of a mm-wave PA need to be designed with small mismatch in the entire operating bandwidth. For this purpose, the matching equations of transformer-based matching networks (TMNs) are derived, based on which a method to synthesize TMN is proposed and applied to a 60GHz PA designed for the 802.11ad application. Implemented in a 65nm bulk CMOS technology, the PA achieves smaller degradation of power performance even compared to reported works in more advanced CMOS technologies. From 57 to 66GHz, the PA is measured with PSAT of 13.94 to 14.35dBm, P1dB of 10.81 to 11.68dBm, and peak PAE of 18.9% to 21.1%. With an EVM of 8.91%, the PA is capable of delivering 16QAM modulated signal with an output power larger than 10.8dBm and PAE higher than 10.1% in all the 4 channels of 802.11ad.
- Conference Article
22
- 10.1109/wamicon.2012.6208464
- Apr 1, 2012
This paper presents a novel method by using resonators in both input and output matching networks to design a tri-band GaN HEMT power amplifier. Two parallel resonators in series as one frequency selection element are used for each operation frequency. By applying this frequency selection element in both input and output matching networks constructed with microstrip line, tri-band matching network is realized. With our proposed frequency selection element, we can use the conventional L-type structure to design matching network for three frequencies so that the design analysis procedure is easier. We also propose a new simplified output matching network by using bias line to match the output impedance to reduce the number of resonators. To demonstrate our method, we fabricate a tri-band power amplifier that can work at 1 GHz, 1.5 GHz, and 2.5 GHz concurrently. Experimental results show that the output power is 39.8 dBm, 40.8 dBm, and 39.2 dBm with 56.4%, 58.3%, and 43.4% power added efficiency (PAE) at 1 GHz, 1.5 GHz and 2.5 GHz, respectively.
- Research Article
2
- 10.1002/mop.32283
- Feb 5, 2020
- Microwave and Optical Technology Letters
In this article, we report a compact and low‐profile GaN‐based broadband power amplifier using silicon interposer‐MMIC (iMMIC) technology. The iMMIC technology enables a GaN HEMT to be embedded in the silicon substrate, and passive circuit elements such as metal‐insulator‐metal (MIM) capacitors, spiral inductors, and thin film resistors to be implemented on the high‐resistivity silicon (HRS) substrate using standard integrated passive device (IPD) process, so that the final power amplifier is almost indistinguishable from a single GaN MMIC power amplifier. The RLC matched all‐pass network and LC ladder type low‐pass network are employed as the input matching network and output matching network, respectively. The proposed power amplifier has a Psat of 39.1 to 39.2 dBm with a power‐added efficiency (PAE) of 40% to 50.5% in the frequency range of 2.1 to 3.5 GHz under continuous wave (CW) input signal. The proposed iMMIC power amplifier occupies only 9.9 mm2.
- Conference Article
- 10.23919/piers-fall62445.2025.11393980
- Nov 4, 2025
A novel diplexer-like dual-band power amplifier (PA) with integrated harmonic control based on dual transmission lines (DTL) is designed. The proposed PA has a diplexer-like output matching network (OMN), amplifying dual-frequency signals with a transistor and dividing the two frequency bands into different output ports for output. This design effectively solves the application scenario of multi-device collaboration that requires multi-frequency power amplification in the Wireless Power Transmission (WPT) system. The dual transmission line structure employs a simple and compact circuit topology, compared with other harmonic-tuned OMNs with open/short shunt stubs, and provides higher power-added efficiency (PAE) by realizing higher-order harmonic suppression. The fundamental wave matching part adopts an L-type matching network design. A T-type dual-band quarter-wavelength line is adopted as the bias circuit to provide the transistor with an appropriate DC operating point. The input matching network (IMN) part is composed of a dual-band susceptance stub network (DSSN) and cascaded microstrips to match the optimal impedance. For demonstration, a diplexer-like PA (non-concurrent) operating at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2.1 / 3.5 \text{GHz}$</tex> was designed. The maximum gains <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$S_{21}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$S_{31}$</tex> of the small-signals simulations in the upper and lower frequency bands were 15.6 dB and 14.7 dB, respectively. The return loss <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$S_{11}$</tex> was −13.9 dB and −23.8 dB, respectively, at 2.1 GHz and 3.5 GHz, and the isolation <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$S_{23}$</tex> between the output ports was less than −44 dB. The suppression level of one frequency output branch for another frequency band can reach −28.5 dB and −33.8 dB. The output power of the PA at frequencies of 2.1 GHz and 3.5 GHz is 41 dBm and 41.5 dBm, respectively. The maximum drain efficiency (DE) can reach 65.8 % and 64.2 % respectively.
- Conference Article
4
- 10.1109/wamicon.2018.8363922
- Apr 1, 2018
This paper describes a high output power (133W) inverse class-F (class-F <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> ) GaN HEMT power amplifier (PA) for space applications. The PA operates at 1.227GHz-the L2C second civilian GPS signal operation frequency. Harmonic controlling matching networks are designed to achieve class-F <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> current and voltage waveforms at the intrinsic drain. High efficiency is achieved by using harmonic source and load-pull tuning to design the input and output matching networks. The fo matching is performed using a low-Z single-section transformer. Harmonic terminations for 2fo and 3fo are realized using shunt transmission lines placed at optimal offsets from the drain. These matching networks are fine-tuned using a network analyzer. The overall PA performance was tested under different DC biases with swept input power. The best performance is achieved with a bias of V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ds</sub> =50V, V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gs</sub> =-3V and P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">in</sub> =32dBm where the PA exhibits 133W output at 42% power-added efficiency (PAE).
- Research Article
9
- 10.1109/tmtt.2025.3530435
- Apr 1, 2025
- IEEE Transactions on Microwave Theory and Techniques
This article presents a wideband front-end module (FEM) topology with integrated transmit/receive (T/R) switch utilizing a matching network (MN) reuse technique. The output MN (OMN) of the power amplifier (PA) and the input MN (IMN) of the low noise amplifier (LNA) are reused in the switch network co-design, enabling T/R switching and impedance transformation simultaneously. In TX mode, a switchless MN incorporating RX reactance is employed to improve the output power and efficiency. In RX mode, the OMN of the PA serves as an extra resonant tank and can be absorbed into the RX MN to enhance RX bandwidth and noise performance. To validate the proposed FEM topology, we implemented a 24–30-GHz FEM for 5G millimeter-wave (mmWave) applications using a commercial 0.15-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula>m gallium nitride (GaN) high-electron-mobility transistor (HEMT) process. The TX branch achieves a small-signal gain greater than 17 dB, a 14.5%–17% saturated power-added efficiency (PAE), and 27.4–29.5-dBm saturated output power. The average output power, measured at an error vector magnitude (EVM) of less than −25 dB, is 21.9 dBm with an average PAE of 4%. The RX branch demonstrates a small-signal gain of 18.5 dB, a noise figure (NF) of less than 4.4 dB, and an OP<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text {1, dB}}$ </tex-math></inline-formula> of 12 dBm. In addition, the chip area is only <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2.1\times 2.6$ </tex-math></inline-formula> mm.
- Conference Article
- 10.1109/cama56352.2022.10002467
- Dec 14, 2022
A new method for designing a wideband filtering power amplifier (FPA) is proposed in this paper, which utilizes multimode resonant cavities as input matching network (IMN) and output matching network (OMN) to realize the required complex impedance matching. This design method can not only achieve wide operational bandwidth with good return loss and compact circuit size, but also provide frequency selectivity with steep rejection skirt and high efficiency. For demonstration, a proposed wideband FPA at 3.5 GHz has been designed and simulated, which utilizes two triple-mode resonant cavities as its input and output complex impedance matching networks. EM-simulated results show it achieves an average gain of 17.5 dB with a fractional bandwidth of 21.5% (gain fluctuation $\lt1.5$ dB). The maximum power added efficiency (PAE) and saturation power can reach 63% and 40 dBm, respectively.
- Research Article
12
- 10.1109/tcsii.2022.3163178
- Feb 1, 2023
- IEEE Transactions on Circuits and Systems II: Express Briefs
This brief presents an X/Ku concurrent dual-wideband power amplifier (PA) monolithic microwave integrated circuit (MMIC) fabricated with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.25{\mu }\text{m}$ </tex-math></inline-formula> GaN-on-SiC technology. The input matching network (IMN) and output matching network (OMN) of the proposed PA are designed based on electric and magnetic coupled symmetric multi-resonator matching networks (MRMNs) respectively to obtain four reflection zeros. Through symmetrical network analysis method, the four reflection zeros of the matching network are equally divided into two sub frequency bands and an optimal dual-wideband matching performance is realized. The proposed PA obtains average saturated output power of 36.9dBm and 35.9dBm in 9GHz–10GHz and 13.5GHz–16GHz. The measured average power-added efficiency (PAE) are 34.8% and 32.6% in 9GHz–10GHz and 13.5GHz–16GHz.
- Conference Article
91
- 10.1109/isscc.2015.7062914
- Feb 1, 2015
Wideband power amplifiers (PAs) with high power-added efficiency (PAE) are required by software-defined radio and high-data-rate communications. A PA in Class-AB, which can provide linear amplification with PAE better than Class-A, has been reported in [1] to achieve bandwidth larger than one octave. However, Class-AB operation generates a large amount of 2nd-harmonic current at the transistor output, which has amplitude as high as up to 42% of the fundamental current in theory [2]. An output matching network, providing optimum load impedance only at the fundamental frequency, is insufficient to achieve good power performance, bringing big challenges to integrated Class-AB PA design with octave bandwidth. In this work, we demonstrate a 2-to-6GHz (fractional bandwidth of 115.5%) Class-AB PA designed in 65nm CMOS. An output matching technique based on differential architecture, which enables the PA to achieve a maximum PAE of 28.4% and an overall PAE above 19%, is proposed to provide transistor output with optimum load impedance for both fundamental and 2nd harmonic over an octave bandwidth. Without using any pre-distortion, the PA can deliver output power of 9.31 to 11.31dBm with EVM<-32dB for 256QAM signal (802.11ac format, 20MHz bandwidth) from 2 to 6GHz.
- Conference Article
2
- 10.1109/cama56352.2022.10002501
- Dec 14, 2022
This paper presents a new method that improves the stability of the C-band GaN power amplifier (PA) while maintaining high PA gain. It is well known that the electromagnetic (EM) coupling between the PA input and output matching network (MN) can degrade the PA stability. In this paper, an iteration method is used to monitor the design of the input MN to compensate the EM coupling and stabilize the whole PA, while the output MN is designed to improve the PA efficiency by carefully controlling the drain impedances at multiple harmonic frequencies. By using the proposed method, a 5.8GHz class-F power amplifier is designed, fabricated and measured. Experimental results reveals that the proposed PA archives a saturation output power of 38.2dBm, drain efficiency of 70.7% and gain of 13.5dB while maintaining a high stability factor over the entire frequency band.
- Research Article
- 10.1002/jnm.70127
- Sep 1, 2025
- International Journal of Numerical Modelling: Electronic Networks, Devices and Fields
ABSTRACTA spoof surface plasmon (SSPP) structure is applied to the design of a radio frequency (RF) reconfigurable power amplifier (PA). An input matching network of a reconfigurable PA is designed by a SSPP structure, while an output matching network is formed by a reconfigurable matching structure. An analysis and discussion of the electromagnetic characteristics of the proposed SSPP structure is presented. Gradient algorithms are used in the ADS tool to further optimize the performance of the PA. According to the test results, the reconfigurable PA based on SSPP theory achieves 41.8 dBm output power (Pout) and 65.5% power added efficiency (PAE) at 1.5 GHz and 40.1 dBm Pout and 64.2% PAE at 2.4 GHz. This layout has a total size of 71.5 by 35 mm. Compared to previously published reconfigurable works, the PA designed in this work has a simpler structure and smaller size while maintaining high efficiency and output power. A digital pre‐distortion (DPD) is implemented to further verify the linearity of the SSPP‐based PA. With the DPD, the linearity of the SSPP PA was significantly improved.
- Conference Article
4
- 10.1109/apmc52720.2021.9661869
- Nov 28, 2021
This paper presents a compact wideband power amplifier (PA) which can be reconfigured in two different wide bands for 5G applications. To achieve the reconfiguration of operation frequencies and reduce the circuit volume, a simple switching T-shaped impedance matching network is adopted, including only one PIN diode, to realize the input matching network (IMN) and output matching network (OMN). The second harmonic control technology is adopted to improve the performance. To demonstrate the reconfigurability of two wide bands, a PA was designed and fabricated to operate at 3.2-3.6 GHz and 4.6-5.0 GHz based on GaN HEMT die device. The size of PA is 43x45 mm. Measured results show that the designed PA achieves 40.5-41.7 dBm output power and 53%-71% drain efficiency in the first band, while 39-40.4 dBm output power and 48%-56% drain efficiency in the second band.
- Conference Article
3
- 10.1109/wamicon.2013.6572749
- Apr 1, 2013
In this paper, a novel half mode substrate integrated waveguide (HMSIW) 10W power amplifier (PA) designed with HMSIW matching network (MN) is presented for the first time. The HMSIW-based matching network (MN) is designed with microstrip-to-HMSIW transition and an inductive metalized post in HMSIW. The impedance matching for the fundamental frequency 2.14 GHz is realized by moving the position of the inductive metalized post in the HMSIW. Both the input and output MNs are designed with the proposed HMSIW-based MN concept. One HMSIW-based 10W PA using GaN HEMT at 2.14 GHz is designed, fabricated, and measured. The proposed HMSIW-based PA can be easily connected with any microstrip or SIW-based circuit. Measured results show that the maximum power added efficiency (PAE) is 72.2 % with 40.7 dBm output power and the maximum gain is 20.1 dB. At the design frequency of 2.14 GHz, the size of the proposed HMSIW-based PA is comparable with other microstrip-based PAs.
- Research Article
13
- 10.1109/tmtt.2019.2931899
- Oct 1, 2019
- IEEE Transactions on Microwave Theory and Techniques
A triple-band CMOS power amplifier (PA) is presented. We propose a design methodology using an input matching network to support triple-band operation at 0.9, 1.8, and 2.4 GHz. We also propose an output matching network for the triple-band operation. Given that 1.8 and 2.4 GHz are the harmonic components when the PA is operating at 0.9 GHz, we design the output matching network to be switchable to suppress the harmonic components at the operating frequency. Using this switchable network, we obtain an optimum power matching point for each of the three operating frequencies. To verify the feasibility of the proposed structure, we designed a PA using a 180-nm RFCMOS process. It was measured using a wideband code division multiple access (WCDMA), Long-Term Evolution (LTE) at a 10/20-MHz bandwidth and wireless local area network (WLAN) 802.11n applications. The measured output power was 27.2/26.6 dBm, and the power-added efficiency (PAE) was 22.9%/30.6% under an adjacent channel leakage ratio (ACLR) of -33 dBc at 0.95/1.8 GHz, respectively, with a WCDMA modulation signal. In the case of an LTE modulation signal, the measured output power was 25.1/23.5 dBm, and the PAE was 27.7%/23.6% under an ACLR of −30 dBc for a 10/20-MHz bandwidth, respectively, at 1.8 GHz. The measured output power was 21 dBm, and the PAE was 20% under an error vector magnitude (EVM) of 3.98% at 2.4 GHz for a WLAN modulation signal. Based on the measured results, we successfully verified the feasibility of the proposed PA.
- Research Article
2
- 10.1080/03772063.2021.1986149
- Oct 19, 2021
- IETE Journal of Research
This paper introduces a design methodology that reduces the fundamental trade-off between linearity and power added efficiency (PAE) in CMOS power amplifier (PA). In our work, a stacked power block (SPB) has been proposed to mitigate the effect of gate–source capacitance (Cgs), thus linearizing the PA. Each stage is biased independently to shape the gain profile, either to be in the expanded mode or in the compressed mode, in which once combined it delivers a flat gain response and confirming the linearity performance. Efficient PI input and output matching networks are proposed to ensure no further distortion, once connected to the 50 Ω source and load. The PA achieves input and output return losses of less than −10 dB from 2.40 to 2.50 GHz. At the center frequency of 2.45 GHz, the SPB-PA achieves a gain of 10 dB and it is unconditionally stable. The proposed gain shaping linearization technique delivers a maximum linear output power (Poutlinmax) of 19.8 dBm with only 3.3 dB back-off from maximum output power (Poutmax) of 23.1 dBm. The SPB-PA meets the WLAN specification with linear PAE of 30% and peak PAE of 36.1%. The proposed SPB-PA reduces the fundamental trade-off between linearity and efficiency. Integration of this PA in wireless SoC shall reduce the chip’s overall power consumption.