Abstract

The use of Hardware-in-the-Loop (HIL) systems implemented in Field Programmable Gate Arrays (FPGAs) is constantly increasing because of its advantages compared to traditional simulation techniques. This increase in usage has caused new challenges related to the improvement of their performance and features like the number of output channels, while the price of HIL systems is diminishing. At present, the use of low-speed Digital-to-Analog Converters (DACs) is starting to be a commercial possibility because of two reasons. One is their lower price and the other is their lower pin count, which determines the number and price of the FPGAs that are necessary to handle those DACs. This paper compares four filtering approaches for providing suitable data to low-speed DACs, which help to filter high-speed input signals, discarding the need of using expensive high-speed DACS, and therefore decreasing the total cost of HIL implementations. Results show that the selection of the appropriate filter should be based on the type of the input waveform and the relative importance of the dynamics versus the area.

Highlights

  • Digital control for power converters has been increasingly used during the last few decades

  • HIL simulations provide an effective platform for real-time testing of a variety of systems such as aerospace vehicles [7], electric cars [8], robots [9], motor drives [10], renewable energy plants [11,12], battery management [13], smart grids [14], satellites [15], and many other kinds of power converters [16,17,18]

  • The solution for the ad-hoc implementations is to use economical low-speed Digital-to-Analog Converters (DACs) with serial protocols, which cost around 1-2 dollars per unit. The problem with this approach is that low-speed DACs are not able to represent high-speed signals correctly

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Summary

Introduction

Digital control for power converters has been increasingly used during the last few decades. The solution for the ad-hoc implementations is to use economical low-speed DACs with serial protocols, which cost around 1-2 dollars per unit The problem with this approach is that low-speed DACs are not able to represent high-speed signals correctly. The speed of such DACs is normally less than 10 MSPS, while the switching frequency of power converters nowadays can reach more than 100 kHz with the traditional technology, and more than 10 MHz with the new GaN and SiC switching technologies, which are becoming increasingly popular [32,33]. One of the possible solutions for this problem can involve filtering the high-speed input signals produced by the model This is useful to provide the DAC input data adapted to its update frequency and data width.

Proposed Filters
Digital schematic of the LOW-PASS
Comparison
Results
Overall Results
Conclusions
Results show that

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