Abstract
This paper presents a study using alpha- and neutron-accelerated tests to characterize soft error rates (SER) of flip-flops that are used in 90-nm CMOS production designs. The investigated flip-flops differ in circuit schematic, V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> , drive strength, and cell height. Both the alpha- and the neutron-induced SER of flip-flops on a dedicated 90-nm test-chip showed a strong dependency on clock and data state. A strong V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> -saturation effect was observed for the alpha-SER under certain operational conditions. Modeling results show that the impact of process variations on flip-flop SER strongly depends on the data state. On average, the SER per bit of the investigated flip-flops is higher than the typical SER per bit of unprotected SRAMs in 90-nm. This observation and the large variation found in the flip-flop results illustrate the importance of SER characterization in order to design reliable integrated circuits
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