Abstract
Considerable progress has been made over the past few years in design for test (DFT) techniques, and its propagation into the mind-set of design engineers. No longer are designers having test after-thoughts; test has become a critical part in product prototype and introduction cycles. This mind-set becomes more prevalent with the advent of IEEE 1149.1 boundary scan, and its design implementation requirements for success. This paper discusses a boundary scan test strategy and implementation for a new extremely dense, ruggedized embedded processor which delivers a peak compute performance of 10GFlops/cubic foot. The system's architects and design engineers recognized the need for DFT, and implemented IEEE 1149.1 boundary scan and a TI 8990 test bus controller to insure not only their success during proto debug, but the overall product's success in manufacturing and after deployment. >
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