Abstract
A novel median filter has been implemented by using a bit-level systolic array. The filter saves more than 23% of transistors when compared with conventional designs. The median filter may be clocked to a maximum 100 MHz for real-time applications. The bit-level systolic array is designed for unlimited word length and extension to larger window sizes.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.