Abstract

A 3.3 V CMOS bandgap reference (BGR) was presented in this study that utilizes MOS transistors operating in the sub-threshold region. The complexity of the circuit and the dependency of the voltage reference on power supply variations are simultaneously decreased through the use of a new compensation circuit technique. The proposed BGR is simulated using a 0.35 $\mu \mathrm{m}$ CMOS standard process. Consequently, a 5.53 ppm/°C temperature coefficient is obtained in the -40~+125 °C temperature range, the maximum power supply rejection ratio is - 62 dB, and a 2.033 mV/V voltage line regulation is achieved for the $2.3\sim 4.3$ V supply voltage. The proposed circuit dissipates a supply current of 8.89 IJA at a 3.3 V supply voltage, and the active area is 112 $\mu \mathrm{m}\times 60 \mu \mathrm{m}$.

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