A 30-36.6 GHz Low Jitter Degradation SIL QVCO with Frequency-tracking Loop in 65 nm CMOS for 5G Frontend Applications

Abstract

In this paper, a low jitter degradation subharmonically injection-locked (SIL) quadrature voltage-controlled oscillator (QVCO) with frequency-tracking loop is presented using 65 nm CMOS process for 5G frontend applications. The QVCO is designed using a modified self-injection coupling technique to enhance the quadrature accuracy. An analog-based frequency-tracking loop is employed in the QVCO to adaptively align the control voltage. As the subharmonic number is 4, the locking frequency is from 30 to 36.6 GHz with a 19.6% fractional bandwidth. The phase noise at 1 MHz offset is −130.3 dBc/Hz, and the jitter integrated from 1 kHz to 40 MHz is 8.7 fs with a degradation of within 7 fs. When the temperature is between 20°C and 70°C, the variations of phase noise, jitter, output power are within 2.5 dB, 5 fs, and 1.5 dB, respectively. The quadrature errors are within 0.5 dB and 0.9°.