Abstract

In this paper, we propose a new class of quasi-cyclic low-density parity-check (QC-LDPC) codes, namely cyclically-coupled QC-LDPC (CC-QC-LDPC) codes, and their RAM-based decoder architecture. CC-QC-LDPC codes have a simple structure and are constructed by cyclically-coupling a number of QC-LDPC subcodes. They can achieve throughput and error performance as excellent as LDPC convolutional codes, but with much lower hardware requirements. They are therefore promising candidates for future generations of communication systems such as long-haul optical communication systems. In particular, a rate-5/6 CC-QC-LDPC decoder has been implemented onto a field-programmable gate array (FPGA) and it achieves a throughput of 3.0 Gb/s at 100 MHz clock rate with 10-iteration decoding. No error floor is observed up to an $E_{b}/N_{0}$ of 3.50 dB, where all $1.14\times 10^{16}$ transmitted bits have been decoded correctly.

Highlights

  • W ITH the growing need of advanced communication technologies, developing superior forward-errorcorrection (FEC) schemes has become imperative

  • LDPC convolutional codes (LDPCCCs) have been shown to possess lower thresholds and better error performance compared with Lowdensity parity-check (LDPC) block codes [9], [10]

  • When burst erasures occur and the erasures are beyond recovery, the chain decoding of LDPCCCs becomes seriously disrupted

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Summary

INTRODUCTION

W ITH the growing need of advanced communication technologies, developing superior forward-errorcorrection (FEC) schemes has become imperative. The min-sum algorithm has lowered the decoder complexity by a significant scale, but at the same time has caused a non-negligible bit-error-rate (BER) degradation [16], [17]. In practical implementations where messages are highly quantized, the accuracy degradation of MS techniques is still not negligible, especially when the check-node degree or code rate is high [16] In another dimension, a layered decoding schedule is proposed to speed up the convergence of iterative decoding [19]. An LDPC convolutional code generally outperforms its block code counterpart in terms of bit error rate and net coding gain [6].

LDPC Codes
Decoding Algorithm
Modified SPA for Implementation
CYCLICALLY-COUPLED QC-LDPC CODES
Overall Architecture
LUT-based CNP with Parallel Routing
Memory Arrangement
Switch Network
Example
IMPLEMENTATION AND PERFORMANCE
Findings
CONCLUSION

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