Abstract

The paper presents a compact power amplifier (PA) topology for reducing quiescent current and current consumption under power backoff operation. The final stage of the PA consists of two parallel transistor cells designed for two different output power operations. By switching between the two cells, terminated with different load impedances, through a unique bias control network, improved efficiency is achieved over a wide range of low output power compared to the conventional PA. A 1.95 GHz WCDMA InGaP/GaAs HBT PA module (PAM) has been developed to validate the proposed circuit. The PAM demonstrates a very low quiescent current of 20 mA. It exhibits 40.5% PAE (power added efficiency) and -40 dBc ACLR1 at 28 dBm Pout. At a backoff output power of 18 dBm, the PAM achieves 19% PAE with -41 dBc ACLR1. The current consumption under backoff operation has been reduced by over 40% compared to the conventional design.

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