Abstract
A fully-integrated power amplifier (PA) designed with 8 stacked transistors is implemented in a 0.25/SPL mu/m Ultra-CMOS Silicon-on-Sapphire (SOS) technology. The stacked Cascode configuration allows the PA to deliver high gain and high output power while maintaining the PA stability. At 2.2 GHz, the PA under a bias supply of 16 V (2V per transistor) measures a saturated output power PSAT of 28.5 dBm (0.7 Watt) and a linear gain of 21.7 dB with a peak power-added efficiency (PAE) and drain efficiency (DE) of 16% and 18.5%, respectively. PAE and DE increase to 25.5% and 29%, respectively, when the PA is biased with a 13 V power supply. In the frequency range of 1.8 to 2.4 GHz the PSAT was above 27.6 dBm.
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