A 16 Gb/s serial link transceiver with active inductor based CTLE and 3-tap DFE in 12-nm FinFET CMOS

Abstract

This paper presents a 16 Gb/s serial link transceiver implemented in 12-nm FinFET CMOS technology. The equalization scheme incorporates a 3-tap feed-forward equalizer (FFE) in the transmitter, a 5-stage continuous time linear equalizer (CTLE), and a 3-tap decision-feedback equalizer (DFE) in the receiver. The proposed FFE structure offers small step size and flexible configuration. The CTLE's high-frequency boost is augmented by integrating an active inductor. A high-accuracy clock and data recovery (CDR) circuit, featuring a cascaded two-step analog phase interpolator (PI) structure, is developed for data retiming. Occupying a footprint of 0.26 mm × 0.63 mm per lane, the transceiver test chip is packaged in a flip chip ball grid array (FC-BGA) module. Measurement results demonstrate a horizontal eye opening of 38 % at a bit error rate (BER) of 10−12 over a channel with 28 dB loss at 8 GHz. Moreover, the power consumption is 68.85 mW per lane at 16 Gb/s.