Abstract
This paper presents sub-1V, low voltage and low power reference voltage using a body biasing technique. The body biasing is used to generate a supply independent current as well as the output reference voltage. The gate to source voltage difference is used to obtain the output voltage. The proposed reference voltage is implemented and simulated in Cadence Virtuoso using SCL180nm CMOS technology model for 0.55-1.8V supply range. The average output reference voltage of 250mV is obtained at room temperature with the line regulation of 1.9mV/V. The supply current of 40nA is found at 0.55V supply along with minimum temperature coefficient (TC) of 28.6ppm/oC for a temperature range of -50 to 90oC. A high-value PSRR of - 44dB at 100Hz and -16dB at 1MHz is achieved. It has an area of 0.0036mm2.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
