7 - Subsystem testing of solder joints against drop impact

Abstract

This chapter investigates the subsystem test methods for microelectronic assembly. The electrical failure of mobile phones upon drop impact caught the microelectronic and printed circuit board (PCB) assembly industries by surprise. A frenzy of activity ensued to develop a subsystem test method for evaluating the design of board-level interconnections independent of the design of the portable electronic product, which the microelectronic assembly industry has no control over. This chapter reviews the subsystem test methods, including the JEDEC standard JESD22-B111, which is essentially an acceleration-shock test in which the acceleration is induced by drop impact that in turns induces the PCB assembly into harmonic vibration. The mechanics of failure can in principle be replicated by bending the PCB assembly cyclically at high speed, which is a much simpler test method. This chapter presents an elaborated correlation study between the high-speed cyclic bending test and the JEDEC test method. Solder joints are susceptible to brittle fracture at high strain rate. This demands high manufacturing quality of solder joints, which can be tested most economically at the component level. Thus, this chapter also reviews the progress toward developing a component-level test method, including the ball impact shearing test, which has been incorporated into the JEDEC standard JESD22-B117A.