Abstract

This paper proposes a 6Gbps receiver for 8K 240Hz OLED display. In the proposed receiver, video image compression is presented to double the effective data bandwidth. In addition, it proposes dual path CTLE offset voltage calibration and CTLE adaptation with eye margin tester to implement 6Gbps receiver. The prototype IC is implemented in a 0.18μm HVCMOS process and is evaluated as an 8K 65‐inch panel.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.