Abstract
One major challenge to scaling quantum dot qubits is the dense wiring requirements, making it difficult to envision fabricating large 2D arrays of nearest-neighbor-coupled qubits necessary for error correction. We describe a method to ameliorate this issue by spacing out the qubits using superconducting resonators facilitated by 3D integration. To prove the viability of this approach, we use integration to couple an off-chip high-impedance TiN resonator to a double quantum dot in a Si/SiGe heterostructure. Using the resonator as a dispersive gate sensor, we tune the device down to the single electron regime with an SNR = 5.36. Characterizing the individual systems shows 3D integration can be done while maintaining low-charge noise for the quantum dots and high-quality factors for the superconducting resonator (single photon QL = 2.14 × 104 with Qi ≈ 3 × 105), necessary for readout and high-fidelity two-qubit gates.
Highlights
One major challenge for noisy intermediate-scale quantum (NISQ)-era superconductor and semiconductor qubit systems lies in the wiring interconnect problem[1,2]
We describe a method to ameliorate this issue by spacing out the qubits using superconducting resonators facilitated by 3D integration
In order to implement the surface code for quantum error correction, a 2D grid of N × N nearest-neighbor coupled qubits is minimally necessary[13]. This requirement is of great practical concern, as the need for dense networks of sub-100 nm sized electrodes to form a large array of coupled spins is major interconnect engineering challenge with current proposals requiring several technical innovations before becoming feasible[14]
Summary
One major challenge for noisy intermediate-scale quantum (NISQ)-era superconductor and semiconductor qubit systems lies in the wiring interconnect problem[1,2]. 3D integration and measurement of a semiconductor double quantum dot with a high-impedance TiN resonator
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