Abstract

A block replicate bubble memory chip with a 14×16μm2 bit cell size has been developed using state-of-the art bubble technology. Organized into 282 minor loops and 1025 bits per minor loop, the total capacity of the chip is 289,050 bits. At 25°C and 45 Oe drive the start-stop operating bias margin is 18 Oe up to at least 300 kHz field rate. For operation over the temperature range −25°C to 100°C and up to 300 kHz, all chip drive parameters have at least ±10 percent operating range indicating that no drive parameter is required to be temperature compensated.

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