2022 roadmap on neuromorphic computing and engineering

all processing to the cloud. The common challenge for wide scale adaptation of edge computing in Internet of Things (IoT) and wearable applications is the constraints posed by the limited energy and memory available in these devices. Neuromorphic engineering is a possible solution to this problem where different approaches such as analog or physical based processing, non von-Neumann architectures, low-precision digital datapath and event or spike based processing are used to overcome energy and memory bottlenecks. Therefore, it is no surprise that Neuromorphic engineering was recently voted as one of the top ten emerging technologies by the World Economic Forum and the market for neuromorphic hardware is expected to grow to " $1.8B by 2023/2025. However, cross-layer innovations on neuromorphic algorithms, architectures, circuits, and devices are required to enable adaptive intelligence especially on embedded systems with severe power and area constraints.

Memristors mimic synaptic functions in advanced electronics and image sensors, thereby enabling brain-inspired neuromorphic computing to overcome the limitations of the von Neumann architecture. As computing operations based on von Neumann hardware rely on continuous memory transport between processing units and memory, fundamental limitations arise in terms of power consumption and integration density. In biological synapses, chemical stimulation induces information transfer from the pre- to the post-neuron. The memristor operates as resistive random-access memory (RRAM) and is incorporated into the hardware for neuromorphic computing. Hardware composed of synaptic memristor arrays is expected to lead to further breakthroughs owing to their biomimetic in-memory processing capabilities, low power consumption, and amenability to integration; these aspects satisfy the upcoming demands of artificial intelligence for higher computational loads. Among the tremendous efforts toward achieving human-brain-like electronics, layered 2D materials have demonstrated significant potential owing to their outstanding electronic and physical properties, facile integration with other materials, and low-power computing. This review discusses the memristive characteristics of various 2D materials (heterostructures, defect-engineered materials, and alloy materials) used in neuromorphic computing for image segregation or pattern recognition. Neuromorphic computing, the most powerful artificial networks for complicated image processing and recognition, represent a breakthrough in artificial intelligence owing to their enhanced performance and lower power consumption compared with von Neumann architectures. A hardware-implemented CNN with weight control based on synaptic memristor arrays is expected to be a promising candidate for future electronics in society, offering a solution based on non-von Neumann hardware. This emerging paradigm changes the computing algorithm using entirely hardware-connected edge computing and deep neural networks.

With the rapid development of big data, advanced data storage technologies with lower power consumption, faster switching speed, higher integration density and larger storage capacity have become the target of storage electronics in the future. However, traditional Si-based CMOS technology and von Neumann architecture will reach their limits, which cannot satisfy the needs of ultra-high density, ultra-small size, and in-memory computing. Due to their low cost, fast speed, easy handling, high energy efficiency, good scalability and flexibility, organic resistive memories are expected to be candidates for high-density storage, logic computing, and neuromorphic computing. In this chapter, we summarize the research progress of organic resistive switching materials and devices. Firstly, the device structure, storage type and switching mechanism are introduced in detail. Secondly, the design strategies and memory properties of various organic resistive switching materials including organic small molecules, organometallic compounds, polymers, and biomaterials are systematically summarized, while the key performance parameters of the memories are also specifically mentioned. Next, the applications of memristors in neuromorphic computing such as artificial synapses, image recognition, and in-memory arithmetic and logic computing are also discussed. Finally, the current challenges and future directions in developing organic resistive memory materials and their neuromorphic devices are outlined.

The White House and Department of Energy have been instrumental in driving the development of a neuromorphic computing program to help the United States continue its lead in basic research into (1) Beyond Exascale—high performance computing beyond Moore’s Law and von Neumann architectures, (2) Scientific Discovery—new paradigms for understanding increasingly large and complex scientific data, and (3) Emerging Architectures—assessing the potential of neuromorphic and quantum architectures. Neuromorphic computing spans a broad range of scientific disciplines from materials science to devices, to computer science, to neuroscience, all of which are required to solve the neuromorphic computing grand challenge. In our workshop we focus on the computer science aspects, specifically from a neuromorphic device through an application. Neuromorphic devices present a very different paradigm to the computer science community from traditional von Neumann architectures, which raises six major questions about building a neuromorphic application from the device level. We used these fundamental questions to organize the workshop program and to direct the workshop panels and discussions. From the white papers, presentations, panels, and discussions, there emerged several recommendations on how to proceed.

Neuromorphic computing is a brain-inspired computing paradigm that aims to construct efficient, low-power, and adaptive computing systems by emulating the information processing mechanisms of biological neural systems. At the core of neuromorphic computing are neuromorphic devices that mimic the functions and dynamics of neurons and synapses, enabling the hardware implementation of artificial neural networks. Various types of neuromorphic devices have been proposed based on different physical mechanisms such as resistive switching devices and electric-double-layer transistors. These devices have demonstrated a range of neuromorphic functions such as multistate storage, spike-timing-dependent plasticity, dynamic filtering, etc. To achieve high performance neuromorphic computing systems, it is essential to fabricate neuromorphic devices compatible with the complementary metal oxide semiconductor (CMOS) manufacturing process. This improves the device’s reliability and stability and is favorable for achieving neuromorphic chips with higher integration density and low power consumption. This review summarizes CMOS-compatible neuromorphic devices and discusses their emulation of synaptic and neuronal functions as well as their applications in neuromorphic perception and computing. We highlight challenges and opportunities for further development of CMOS-compatible neuromorphic devices and systems.

Conventional computers based on the von Neumann architecture are inefficient in parallel computing and self-adaptive learning, and therefore cannot meet the rapid development of information technology that needs efficient and high-speed computing. Owing to the unique advantages such as high parallelism and ultralow power consumption, bioinspired neuromorphic computing can have the capability of breaking through the bottlenecks of conventional computers and is now considered as an ideal option to realize the next-generation artificial intelligence. As the hardware carriers that allow the implementing of neuromorphic computing, neuromorphic devices are very critical in building neuromorphic chips. Meanwhile, the development of human visual systems and optogenetics also provides a new insight into how to study neuromorphic devices. The emerging optoelectronic neuromorphic devices feature the unique advantages of photonics and electronics, showing great potential in the neuromorphic computing field and attracting more and more attention of the scientists. In view of these, the main purpose of this review is to disclose the recent research advances in optoelectronic neuromorphic devices and the prospects of their practical applications. We first review the artificial optoelectronic synapses and neurons, including device structural features, working mechanisms, and neuromorphic simulation functions. Then, we introduce the applications of optoelectronic neuromorphic devices particularly suitable for the fields including artificial vision systems, artificial perception systems, and neuromorphic computing. Finally, we summarize the challenges to the optoelectronic neuromorphic devices, which we are facing now, and present some perspectives about their development directions in the future.

In this information era with bursting data, there are three fundamental problems limiting the further development of computing power: The gradually slowing down of Moore’s law, the rapidly increasing energy consumption while scaling down, and the restriction of data transfer between separated memory and processor known as “Von Neumann bottleneck”. To deal with massive data and make all things in our daily life interconnected, it is imperative to develop new generation of computing paradigms, for example, neuromorphic computing. Inspired by the human brain, neuromorphic computing has drawn extensive attention in recent years due to its high parallelism, low power consumption and in-memory computation, especially when the tide of artificial intelligence is sweeping across the globe now. Novel neuromorphic devices are key to the construction of neuromorphic computing systems, providing an efficient implementation of artificial neural network on chip. Besides, by simulating the behavior of biological neurons and synapses at the physical level, neuromorphic devices can enable a brand new computing method, which is thought to be an essential and promising way to build a brain-like system on chip. This paper focuses on the current research progresses and future research trends of neuromorphic devices. It summarizes the physical mechanisms of neuromorphic devices, according to which they can be divided into ion-migration device, material phase change device, electron-migration device, magnetic device and so on. It further details the inner dynamics happened in a single device by characterizing the changing process in transmission electron microscope. This paper also explains how these neuromorphic devices can be used for computing, where memristor, as the missing fourth basic circuit component, is used as a theoretical support. Through making up a crossbar structure, these devices can directly calculate vector-matrix multiplication by Ohm’s law and Kirchhoff’s law. It is an elegant way that can accelerate artificial neural network in parallel by computing in memory. In addition, exploiting the intrinsic dynamics in the devices can realize complex and interesting functions of biological neural networks, such as long-term plasticity, short-term plasticity and spike timing dependent plasticity. For example, a synaptic transistor based on two-dimensional materials WSe2 can simulate the biologically transport process of calcium ion, leading precisely regulated coexistence of long-term and short-term memory. Remarkably, a significant advance is realizing heterosynaptic plasticity, a general mode in brain’s cortical network, in a single multi-terminal device, which is crucial for biologically plausible supervised learning on hardware. Furthermore, artificial neurons composed of memristors and capacitors have some natural advantages compared to traditional circuits, containing rich dynamics for neuromorphic computing, such as stochasticity, adaptive threshold and chaotic oscillation. Recently, materials with new mechanisms, like ferroelectric materials, are also being explored to realize complex neuron functions, contributing to less power and smaller area. By devices and algorithms co-design, it is time to explore the next generation of neural network, transforming current processing unit to a more efficient and intelligent brain-inspired style. As a conclusion, the outstanding challenges and trends in the field of neuromorphic devices are discussed in this paper. These researches are promising for building a neuromorphic computer in the future, which will be complementary to classical computer and outperform in many tasks.

In recent decades, the microelectronics industry has developed rapidly based on the von Neumann architecture and under the guidance of Moore's law. However, as the size of electronic devices approaches the limit and power consumption increases, traditional microelectronic materials and devices are facing more and more challenges. As a new type of semiconductor material, halide perovskites (HPs) have excellent photoelectric characteristics, such as high carrier mobility, controllable band structure, etc., which have been widely used in solar cells, light emitting diodes (LEDs), photodetectors, memristors, and in other fields. Among them, the memristor, as a new type of electronic device, is very promising for in‐memory computing with low power consumption by breaking the limit of von Neumann architecture. Especially, HPs‐based memristors show outstanding photoelectric response performance, low power consumption, and flexible wearability, allowing them to hold great application potential in logical operation, polymorphic storage, and neuromorphic computing, etc. In this review, we first briefly introduce the basic characteristics and preparation methods of HPs. Secondly, the development history, device structure, and performance parameters of memristors are depicted in detail. Thirdly, the resistance mechanism and application of HPs‐based memristors are discussed. Finally, the research status and development prospects of HPs‐based memristors are outlined.

MXenes: promising 2D memristor materials for neuromorphic computing components

Neuromorphic algorithms are being increasingly deployed across the entire computing spectrum from data centers to mobile and wearable devices to solve problems involving recognition, analytics, search and inference. For example, large-scale artificial neural networks (popularly called deep learning) now represent the state-of-the art in a wide and ever-increasing range of video/image/audio/text recognition problems. However, the growth in data sets and network complexities have led to deep learning becoming one of the most challenging workloads across the computing spectrum. We posit that approximate computing can play a key role in the quest for energy-efficient neuromorphic systems. We show how the principles of approximate computing can be applied to the design of neuromorphic systems at various layers of the computing stack. At the algorithm level, we present techniques to significantly scale down the computational requirements of a neural network with minimal impact on its accuracy. At the circuit level, we show how approximate logic and memory can be used to implement neurons and synapses in an energy-efficient manner, while still meeting accuracy requirements. A fundamental limitation to the efficiency of neuromorphic computing in traditional implementations (software and custom hardware alike) is the mismatch between neuromorphic algorithms and the underlying computing models such as von Neumann architecture and Boolean logic. To overcome this limitation, we describe how emerging spintronic devices can offer highly efficient, approximate realization of the building blocks of neuromorphic computing systems.

Conventional techniques of off-chip processing for wearable devices cause high hardware resource usage which leads to heat generation and increased power consumption. <span>Hence, edge computing methods such as neuromorphic computing are considered the most promising modern technology to replace conventional processing. It is beneficial to employ neuromorphic processing in electrocardiogram (ECG) classification, enabling engineers to overcome the constraints of heat generation caused by hardware utilization. Thus, this work aims to investigate common building blocks in a spiking neural network (SNN), analyze the spike-based plasticity mechanism and implement ECG classification on a neuromorphic circuit. The MIT-BIH Arrhythmia database (MITDB) is preprocessed in MATLAB, then used to train and test an SNN designed for field programmable gate arrays (FPGA), employing spike-based plasticity and Izhikevich neurons. The behaviour of spike timing dependent plasticity (STDP) in a neuromorphic circuit is also visualized in this work. The state-of the-art performance of this work lies in providing a generic mechanism to adapt ECG classification into a neuromorphic solution, a non-Von Neumann architecture. The proposed digital design utilizes 1.058% of hardware resources on a Zedboard. Application-wise, this work provides a foundation for development of neuromorphic computing in wearable medical devices that perform continuous monitoring of ECG</span>.

We like and need Information and Communication Technologies (ICTs) for data processing. This is measurable in the exponential growth of data processed by ICT, e.g., ICT for cryptocurrency mining and search engines. So far, the energy demand for computing technology has increased by a factor of 1.38 every 10 years due to the exponentially increasing use of ICT systems as computing devices. Energy consumption of ICT systems is expected to rise from 1500 TWh (8% of global electricity consumption) in 2010 to 5700 TWh (14% of global electricity consumption) in 2030 [A. S. G. Andrae, Eng. Appl. Sci. Lett. 3, 19–31 (2020)]. A large part of this energy is required for the continuous data transfer between separated memory and processor units, which constitute the main components of ICT computing devices in von-Neumann architecture. This, at the same time, massively slows down the computing power of ICT systems in von-Neumann architecture. In addition, due to the increasing complexity of artificial intelligence (AI) compute algorithms, since 2010, the AI training compute time demand for computing technology has increased tenfold every year, for example, from 1 × 10−6 to 1 × 10+4 Petaflops/day in the period from 2010 to 2020 [J. Wang, see https://ark-invest.com/articles/analyst-research/ai-training/ for information about the cost to train an AI interference system (2020)]. It has been theoretically predicted that ICT systems in the neuromorphic computer architecture will circumvent all of this through the use of merged memory and processor units. However, the core hardware element for this has not yet been realized so far. In this work, we discuss the perspectives for non-volatile resistive switches with hysteretic memristance as the core hardware element for merged memory and processor units in neuromorphic computers.

Neuromorphic computing, an interdisciplinary field combining neuroscience and computer science, aims to create efficient, bio-inspired systems. Different from von Neumann architectures, neuromorphic systems integrate memory and processing units to enable parallel, event-driven computation. By simulating the behavior of biological neurons and networks, these systems excel in tasks like pattern recognition, perception, and decision-making. Neuromorphic computing chips, which operate similarly to the human brain, offer significant potential for enhancing the performance and energy efficiency of bio-inspired algorithms. This review introduces a novel five-dimensional comparative framework—process technology, scale, power consumption, neuronal models, and architectural features—that systematically categorizes and contrasts neuromorphic implementations beyond existing surveys. We analyze notable neuromorphic chips, such as BrainScaleS, SpiNNaker, TrueNorth, and Loihi, comparing their scale, power consumption, and computational models. The paper also explores the applications of neuromorphic computing chips in artificial intelligence (AI), robotics, neuroscience, and adaptive control systems, while facing challenges related to hardware limitations, algorithms, and system scalability and integration.

Brain-like energy-efficient computing has remained elusive for neuromorphic (NM) circuits and hardware platform implementations despite decades of research. In this work we reveal the opportunity to significantly improve the energy efficiency of digital neuromorphic hardware by introducing NM circuits employing two-dimensional (2D) transition metal dichalcogenide (TMD) layered channel material-based tunnel-field-effect transistors (TFETs). Our novel leaky-integrate-fire (LIF) based digital NM circuit along with its Hebbian learning circuitry operates at a wide range of supply voltages, frequencies, and activity factors, enabling two orders of magnitude higher energy-efficient computing that is difficult to achieve with conventional material and/or device platforms, specifically the silicon-based 7 nm low-standby-power FinFET technology. Our innovative 2D-TFET based NM circuit paves the way toward brain-like energy-efficient computing that can unleash major transformations in future AI and data analytics platforms.

The taking run on artificial intelligence in the last decades is based on the von Neumann architecture where memory and computation units are separately located from each other. This configuration causes a large amount of energy and time to be dissipated during data transfer between these two units, in contrast to synapses in biological neurons. A new paradigm has been proposed inspired by biological neurons in human brains, known as neuromorphic computing. Due to the unusual current-voltage characteristic of memristor devices such as pinched hysteresis loops, memristors are considered a key element of neuromorphic architecture. In this study, we report the basic current-voltage characteristic of the memristor devices in the form of Si/SiO2/Pt(30 nm)/VO x (3, 13, 25 nm)/Pt (30 nm) sandwich structure. Synaptic functions such as spike-time-dependent plasticity (STDP), paired-pulse facilitation (PPF), long-term potentiation (LTP), and long-term depression (LTD) of memristor devices were examined in detail. The oxide layer VO x has been grown by using the VO2 target in a pulsed laser deposition (PLD) chamber. The composition and oxidation states of the oxide layer were examined using the X-ray photoelectron spectroscopy (XPS) technique. The status of oxygen vacancies, which play an active role in the operation of the devices, was examined with a photoluminescence (PL) technique. The experimental results showed that the thickness of the oxide layer can significantly influence the synaptic and resistive switching properties of the devices.