Abstract
A 1T-type FeRAM (Ferroelectric Random Access Memory) has lots of advantages over conventional capacitor-based 1T1C-type or 2T2C-type FeRAM in terms of simplicity of device structure and feasibility of NDRO (Non-Distractive Readout). The 1T-type FeRAM, consequently, is considered as one of the most promising architectures to realize ultra high-density FeRAM. Since the principle of the 1T-type FeRAM was originally reported in the early 60's, for more than 40 years much work has been carried out, in which most developments have mainly focused on that using a ferroelectric gate oxide deposited on silicon channel. However, a fully-satisfied characteristics in the 1T-type FeRAM using ferroelectric gate oxide has not been obtained yet. The major reason is considered to be due to the formation of an intermediate layer between ferroelectric gate oxide and silicon channel is unavoidable during the high temperature crystallization process of ferroelectric oxide.
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