Abstract

A 1-GHz input bandwidth 6-bit analog-to-digital (A/D) converter is described. The A/D converter is designed for an ultra-wideband impulse radio (UWB-IR) receiver that needs to digitize an input signal with a higher frequency than the sampling frequency. With the proposed under-sampling technique, sampling is executed with low-current consumption by separating a sampling capacitor from an operational amplifier and accumulating the offset voltage of the amplifier in another capacitor. In addition, a low-power comparator is proposed, which reduces bias current dynamically corresponding to its input voltage level. The A/D converter is implemented in a 0.18-mum CMOS process technology, which achieves an effective number of bits of 4.9 for input signals with frequencies greater than 1 GHz at 32 M samples/s, and consumes 0.89 mA at a 1.8-V supply. The converter occupies a 0.18 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> area.

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