Abstract
This paper presents a design and fabrication of 0.5 V two stage operational amplifier. The proposed operational amplifier utilizes body-driven differential input stage and self-cascode current mirror structure. Cadence Virtuoso is used for layout and the layout data is verified by LVS through Mentor Calibre. The proposed two stage operational amplifier is fabricated using <TEX>$0.13{\mu}m$</TEX> CMOS process and operation at 0.5 V is confirmed. Measured low frequency small signal gain of operational amplifier is 50 dB, power consumption is <TEX>$29{\mu}W$</TEX> and chip area is <TEX>$75{\mu}m{\times}90{\mu}m$</TEX>.
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