РЕАЛИЗАЦИЯ СОГЛАСОВАННОГО ФИЛЬТРА В ЧАСТОТНОЙ ОБЛАСТИ НА ПЛИС

Abstract

The use of filters matched to radio signals is quite common in radar, which helps to improverange resolution, as well as in communication systems and many other radio engineering systems,allowing you to increase the output signal-to-noise ratio (SNR). Designing digital devices on fieldprogrammable gate array (FPGA) allows us to configure them quite flexibly and create prototypesof radio engineering systems for further implementation of DSP algorithms, on applicationspecificintegrated circuits (ASIC ), GPU, CPU, etc. FPGA digital devices are most used in lowpower mobile systems, while ASICs show the highest performance with high development costs.In this work, special attention is paid to the design and implementation of a filter matched to acomplex chirp signal in the frequency domain on an FPGA using the Xilinx System Generator forDSP library of Matlab/Simulink. The results of the hardware-software model operation are presentedin paper both for a single point object and for three point objects with different sampleddelays. The dependence of the output on the input SNR for a linear and quadratic envelope detectoris shown. The analytical curve SNROUT(SNRIN) is compared with the curve obtained using thedeveloped hardware-software model implemented on the FPGA. The paper shows the benefits ofusing Xilinx System Generator for rapid prototyping of DSPs on FPGAs, and it provides an analysisof the used FPGA resources for the developed matched filter.